summaryrefslogtreecommitdiffstats
path: root/c/src/lib/libbsp/arm/shared/arm-l2c-310
diff options
context:
space:
mode:
authorSebastian Huber <sebastian.huber@embedded-brains.de>2014-06-05 10:01:42 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2014-06-06 08:02:09 +0200
commit40599e7e86f29acd422124223e1758fea7beaa63 (patch)
tree98aefb454d03cc8bf9d157623c87fa698170e58f /c/src/lib/libbsp/arm/shared/arm-l2c-310
parentbsp/altera-cyclone-v: Simplify start hooks (diff)
downloadrtems-40599e7e86f29acd422124223e1758fea7beaa63.tar.bz2
bsps/arm: Change L2 cache initialization
Do not touch the L1 caches since they have been initialized by the start hooks.
Diffstat (limited to 'c/src/lib/libbsp/arm/shared/arm-l2c-310')
-rw-r--r--c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h4
1 files changed, 1 insertions, 3 deletions
diff --git a/c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h b/c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h
index 5e5ef6df4d..577fd2f2e2 100644
--- a/c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h
+++ b/c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h
@@ -1361,7 +1361,6 @@ static inline void
_CPU_cache_enable_data( void )
{
cache_l2c_310_enable();
- arm_cache_l1_enable_data();
}
static inline void
@@ -1375,7 +1374,6 @@ static inline void
_CPU_cache_enable_instruction( void )
{
cache_l2c_310_enable();
- arm_cache_l1_enable_instruction();
}
static inline void
@@ -1590,4 +1588,4 @@ _CPU_cache_get_instruction_cache_size( const uint32_t level )
}
#endif /* __cplusplus */
-#endif /* LIBBSP_ARM_SHARED_L2C_310_CACHE_H */ \ No newline at end of file
+#endif /* LIBBSP_ARM_SHARED_L2C_310_CACHE_H */