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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2013-05-02 17:42:20 +0200 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2013-05-03 17:30:55 +0200 |
commit | 037e8ae50621d218679826170abb39dae254df9c (patch) | |
tree | 2bc1824a107f8a0dcc88e08eac7549b4d9dea96b /c/src/lib/libbsp/arm/shared/arm-cp15-set-ttb-entries.c | |
parent | bsps/arm: Add arm_cp15_mmu_disable() (diff) | |
download | rtems-037e8ae50621d218679826170abb39dae254df9c.tar.bz2 |
bsps/arm: Add arm_cp15_set_trans*_table_entries()
Diffstat (limited to '')
-rw-r--r-- | c/src/lib/libbsp/arm/shared/arm-cp15-set-ttb-entries.c (renamed from c/src/lib/libbsp/arm/lpc32xx/misc/mmu.c) | 53 |
1 files changed, 17 insertions, 36 deletions
diff --git a/c/src/lib/libbsp/arm/lpc32xx/misc/mmu.c b/c/src/lib/libbsp/arm/shared/arm-cp15-set-ttb-entries.c index a6a06aa8bb..fc311a13e3 100644 --- a/c/src/lib/libbsp/arm/lpc32xx/misc/mmu.c +++ b/c/src/lib/libbsp/arm/shared/arm-cp15-set-ttb-entries.c @@ -1,13 +1,5 @@ -/** - * @file - * - * @ingroup lpc32xx_mmu - * - * @brief MMU support implementation. - */ - /* - * Copyright (c) 2010-2011 embedded brains GmbH. All rights reserved. + * Copyright (c) 2010-2013 embedded brains GmbH. All rights reserved. * * embedded brains GmbH * Obere Lagerstr. 30 @@ -20,57 +12,46 @@ * http://www.rtems.com/license/LICENSE. */ -#include <bsp/mmu.h> - -static uint32_t disable_mmu(void) -{ - uint32_t ctrl = 0; +#include <libcpu/arm-cp15.h> - arm_cp15_data_cache_test_and_clean_and_invalidate(); - - ctrl = arm_cp15_get_control(); - arm_cp15_set_control(ctrl & ~ARM_CP15_CTRL_M); - - arm_cp15_tlb_invalidate(); - - return ctrl; -} - -static void restore_mmu_control(uint32_t ctrl) -{ - arm_cp15_set_control(ctrl); -} - -uint32_t set_translation_table_entries( +static uint32_t set_translation_table_entries( const void *begin, const void *end, uint32_t section_flags ) { + uint32_t cl_size = arm_cp15_get_min_cache_line_size(); uint32_t *ttb = arm_cp15_get_translation_table_base(); uint32_t i = ARM_MMU_SECT_GET_INDEX(begin); uint32_t iend = ARM_MMU_SECT_GET_INDEX(ARM_MMU_SECT_MVA_ALIGN_UP(end)); - uint32_t ctrl = disable_mmu(); - uint32_t section_flags_of_first_entry = ttb [i]; + uint32_t ctrl; + uint32_t section_flags_of_first_entry; + + ctrl = arm_cp15_mmu_disable(cl_size); + arm_cp15_tlb_invalidate(); + section_flags_of_first_entry = ttb [i]; while (i < iend) { - ttb [i] = (i << ARM_MMU_SECT_BASE_SHIFT) | section_flags; + uint32_t addr = i << ARM_MMU_SECT_BASE_SHIFT; + + ttb [i] = addr | section_flags; + ++i; } - restore_mmu_control(ctrl); + arm_cp15_set_control(ctrl); return section_flags_of_first_entry; } -uint32_t lpc32xx_set_translation_table_entries( +uint32_t arm_cp15_set_translation_table_entries( const void *begin, const void *end, uint32_t section_flags ) { rtems_interrupt_level level; - uint32_t section_flags_of_first_entry = 0; + uint32_t section_flags_of_first_entry; rtems_interrupt_disable(level); section_flags_of_first_entry = |