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authorPavel Pisa <pisa@cmp.felk.cvut.cz>2016-07-03 17:26:50 +0200
committerPavel Pisa <pisa@cmp.felk.cvut.cz>2016-10-02 10:40:33 +0200
commita114f99bd28cd534b1446d2d85ea681ef1832955 (patch)
tree44b9310939d888604b61e59ab1191436ab8f4ffb /c/src/lib/libbsp/arm/raspberrypi/Makefile.am
parentbsp/arm: Report correct maximal cache line length for ARM Cortex-A + L2C-310. (diff)
downloadrtems-a114f99bd28cd534b1446d2d85ea681ef1832955.tar.bz2
bsps/arm: Change code to explicit selection of cache implementation for ARM BSPs.
The original ARM architecture wide cache_.h is changed to dummy version for targets not implementing/enablig cache at all. The ARM targets equipped by cache should include appropriate implementation. Next options are available for now c/src/lib/libbsp/arm/shared/armv467ar-basic-cache/cache_.h basic ARM cache integrated on the CPU core directly which requires only CP15 oparations c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h support for case where ARM L2C-310 cache controller is used. It is accessible as mmaped peripheral. c/src/lib/libbsp/arm/shared/armv7m/include/cache_.h Cortex-M specific cache support Updates #2782 Updates #2783
Diffstat (limited to 'c/src/lib/libbsp/arm/raspberrypi/Makefile.am')
-rw-r--r--c/src/lib/libbsp/arm/raspberrypi/Makefile.am8
1 files changed, 4 insertions, 4 deletions
diff --git a/c/src/lib/libbsp/arm/raspberrypi/Makefile.am b/c/src/lib/libbsp/arm/raspberrypi/Makefile.am
index c6133df707..bf3c3f297b 100644
--- a/c/src/lib/libbsp/arm/raspberrypi/Makefile.am
+++ b/c/src/lib/libbsp/arm/raspberrypi/Makefile.am
@@ -45,8 +45,7 @@ include_bsp_HEADERS += include/mmu.h
include_bsp_HEADERS += include/usart.h
include_bsp_HEADERS += include/raspberrypi.h
-include_libcpu_HEADERS = ../../../libcpu/arm/shared/include/cache_.h \
- ../../../libcpu/arm/shared/include/arm-cp15.h
+include_libcpu_HEADERS = ../../../libcpu/arm/shared/include/arm-cp15.h
###############################################################################
# Data #
@@ -125,8 +124,9 @@ libbsp_a_SOURCES += misc/timer.c
# Cache
libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
-libbsp_a_SOURCES += ../../../libcpu/arm/shared/include/cache_.h
-libbsp_a_CPPFLAGS += -I$(srcdir)/../../../libcpu/arm/shared/include
+libbsp_a_SOURCES += ../shared/include/arm-cache-l1.h
+libbsp_a_SOURCES += ../shared/armv467ar-basic-cache/cache_.h
+libbsp_a_CPPFLAGS += -I$(srcdir)/../shared/armv467ar-basic-cache
# Start hooks
libbsp_a_SOURCES += startup/bspstarthooks.c