2011-12-06 Sebastian Huber <sebastian.huber@embedded-brains.de>

	* misc/system-clocks.c: New file.
	* Makefile.am: Reflect change from above.
	* include/nand-mlc.h: Fixed lpc32xx_mlc_is_bad_page().
	* make/custom/lpc32xx.inc, make/custom/lpc32xx_mzx_stage_1.cfg: Flags
	for EABI tool chain.
	* configure.ac, include/bsp.h, include/lpc32xx.h, misc/emc.c,
	misc/i2c.c, rtc/rtc-config.c, startup/bspstarthooks.c: Avoid compile
	time ARM_CLK and HCLK.

3 files changed, 152 insertions, 17 deletions

diff --git a/c/src/lib/libbsp/arm/lpc32xx/misc/emc.c b/c/src/lib/libbsp/arm/lpc32xx/misc/emc.c
index b9e8152e47..cdfe2153a7 100644
--- a/c/src/lib/libbsp/arm/lpc32xx/misc/emc.c
+++ b/c/src/lib/libbsp/arm/lpc32xx/misc/emc.c
@@ -93,9 +93,6 @@ static void dynamic_init(const lpc32xx_emc_dynamic_config *cfg)
 
 void lpc32xx_emc_init(const lpc32xx_emc_dynamic_config *dyn_cfg)
 {
-  /* Enable clock */
-  LPC32XX_HCLKDIV_CTRL |= HCLK_DIV_DDRAM_CLK(1);
-
   /* Enable buffers in AHB ports */
   emc_ahb [0].control = EMC_AHB_PORT_BUFF_EN;
   emc_ahb [3].control = EMC_AHB_PORT_BUFF_EN;
diff --git a/c/src/lib/libbsp/arm/lpc32xx/misc/i2c.c b/c/src/lib/libbsp/arm/lpc32xx/misc/i2c.c
index 60526d4fe0..8dfdc58cfc 100644
--- a/c/src/lib/libbsp/arm/lpc32xx/misc/i2c.c
+++ b/c/src/lib/libbsp/arm/lpc32xx/misc/i2c.c
@@ -7,12 +7,13 @@
  */
 
 /*
- * Copyright (c) 2010
- * embedded brains GmbH
- * Obere Lagerstr. 30
- * D-82178 Puchheim
- * Germany
- * <rtems@embedded-brains.de>
+ * Copyright (c) 2010-2011 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
  *
  * The license and distribution terms for this file may be
  * found in the file LICENSE in this distribution or at
@@ -51,31 +52,28 @@ rtems_status_code lpc32xx_i2c_init(
   return lpc32xx_i2c_clock(i2c, clock_in_hz);
 }
 
-#if LPC32XX_HCLK != 104000000U
-  #error "unexpected HCLK"
-#endif
-
 rtems_status_code lpc32xx_i2c_clock(
   volatile lpc32xx_i2c *i2c,
   unsigned clock_in_hz
 )
 {
+  uint32_t clk_div = lpc32xx_hclk() / clock_in_hz;
   uint32_t clk_lo = 0;
   uint32_t clk_hi = 0;
 
   switch (clock_in_hz) {
     case 100000:
-      clk_lo = 520;
-      clk_hi = 520;
+      clk_lo = clk_div / 2;
       break;
     case 400000:
-      clk_lo = 166;
-      clk_hi = 94;
+      clk_lo = (64 * clk_div) / 100;
       break;
     default:
       return RTEMS_INVALID_CLOCK;
   }
 
+  clk_hi = clk_div - clk_lo;
+
   i2c->clk_lo = clk_lo;
   i2c->clk_hi = clk_hi;
 
diff --git a/c/src/lib/libbsp/arm/lpc32xx/misc/system-clocks.c b/c/src/lib/libbsp/arm/lpc32xx/misc/system-clocks.c
new file mode 100644
index 0000000000..f324ef869f
--- /dev/null
+++ b/c/src/lib/libbsp/arm/lpc32xx/misc/system-clocks.c
@@ -0,0 +1,140 @@
+/**
+ * @file
+ *
+ * @ingroup lpc32xx
+ *
+ * @brief System clocks.
+ */
+
+/*
+ * Copyright (c) 2011 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#include <bsp.h>
+#include <bsp/lpc32xx.h>
+
+uint32_t lpc32xx_sysclk(void)
+{
+  uint32_t sysclk_ctrl = LPC32XX_SYSCLK_CTRL;
+
+  return (sysclk_ctrl & 0x1) == 0 ?
+    LPC32XX_OSCILLATOR_MAIN
+      : (397 * LPC32XX_OSCILLATOR_RTC);
+}
+
+uint32_t lpc32xx_hclkpll_clk(void)
+{
+  uint32_t sysclk = lpc32xx_sysclk();
+  uint32_t hclkpll_ctrl = LPC32XX_HCLKPLL_CTRL;
+  uint32_t m = HCLK_PLL_M_GET(hclkpll_ctrl) + 1;
+  uint32_t n = HCLK_PLL_N_GET(hclkpll_ctrl) + 1;
+  uint32_t p = 1U << HCLK_PLL_P_GET(hclkpll_ctrl);
+  uint32_t hclkpll_clk = 0;
+
+  if ((hclkpll_ctrl & HCLK_PLL_BYPASS) != 0) {
+    if ((hclkpll_ctrl & HCLK_PLL_DIRECT) != 0) {
+      hclkpll_clk = sysclk;
+    } else {
+      hclkpll_clk = sysclk / (2 * p);
+    }
+  } else {
+    if ((hclkpll_ctrl & HCLK_PLL_DIRECT) != 0) {
+      hclkpll_clk = (m * sysclk) / n;
+    } else {
+      if ((hclkpll_ctrl & HCLK_PLL_FBD_FCLKOUT) != 0) {
+        hclkpll_clk = m * (sysclk / n);
+      } else {
+        hclkpll_clk = (m / (2 * p)) * (sysclk / n);
+      }
+    }
+  }
+
+  return hclkpll_clk;
+}
+
+uint32_t lpc32xx_periph_clk(void)
+{
+  uint32_t pwr_ctrl = LPC32XX_PWR_CTRL;
+  uint32_t periph_clk = 0;
+
+  if ((pwr_ctrl & PWR_NORMAL_RUN_MODE) != 0) {
+    uint32_t hclkdiv_ctrl = LPC32XX_HCLKDIV_CTRL;
+    uint32_t div = HCLK_DIV_PERIPH_CLK_GET(hclkdiv_ctrl) + 1;
+
+    periph_clk = lpc32xx_hclkpll_clk() / div;
+  } else {
+    periph_clk = lpc32xx_sysclk();
+  }
+
+  return periph_clk;
+}
+
+uint32_t lpc32xx_hclk(void)
+{
+  uint32_t pwr_ctrl = LPC32XX_PWR_CTRL;
+  uint32_t hclk = 0;
+
+  if ((pwr_ctrl & PWR_HCLK_USES_PERIPH_CLK) != 0) {
+    hclk = lpc32xx_periph_clk();
+  } else {
+    if ((pwr_ctrl & PWR_NORMAL_RUN_MODE) != 0) {
+      uint32_t hclkdiv_ctrl = LPC32XX_HCLKDIV_CTRL;
+      uint32_t div = 1U << HCLK_DIV_HCLK_GET(hclkdiv_ctrl);
+
+      hclk = lpc32xx_hclkpll_clk() / div;
+    } else {
+      hclk = lpc32xx_sysclk();
+    }
+  }
+
+  return hclk;
+}
+
+uint32_t lpc32xx_arm_clk(void)
+{
+  uint32_t pwr_ctrl = LPC32XX_PWR_CTRL;
+  uint32_t arm_clk = 0;
+
+  if ((pwr_ctrl & PWR_HCLK_USES_PERIPH_CLK) != 0) {
+    arm_clk = lpc32xx_periph_clk();
+  } else {
+    if ((pwr_ctrl & PWR_NORMAL_RUN_MODE) != 0) {
+      arm_clk = lpc32xx_hclkpll_clk();
+    } else {
+      arm_clk = lpc32xx_sysclk();
+    }
+  }
+
+  return arm_clk;
+}
+
+uint32_t lpc32xx_dram_clk(void)
+{
+  uint32_t hclkdiv_ctrl = LPC32XX_HCLKDIV_CTRL;
+  uint32_t div = HCLK_DIV_DDRAM_CLK_GET(hclkdiv_ctrl);
+  uint32_t dram_clk = 0;
+
+  if (div != 0) {
+    uint32_t pwr_ctrl = LPC32XX_PWR_CTRL;
+
+    if ((pwr_ctrl & PWR_NORMAL_RUN_MODE) != 0) {
+      dram_clk = lpc32xx_hclkpll_clk();
+    } else {
+      dram_clk = lpc32xx_sysclk();
+    }
+
+    dram_clk /= div;
+  }
+
+  return dram_clk;
+}