diff options
author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2011-12-06 14:01:55 +0000 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2011-12-06 14:01:55 +0000 |
commit | f41fb2b6b66aab395591cabdadbeb1a97c8ec59b (patch) | |
tree | 81ee1b1f031740164eada47cdddc81e0457e61a4 /c/src/lib/libbsp/arm/lpc32xx/include | |
parent | 2011-12-06 Sebastian Huber <sebastian.huber@embedded-brains.de> (diff) | |
download | rtems-f41fb2b6b66aab395591cabdadbeb1a97c8ec59b.tar.bz2 |
2011-12-06 Sebastian Huber <sebastian.huber@embedded-brains.de>
* misc/system-clocks.c: New file.
* Makefile.am: Reflect change from above.
* include/nand-mlc.h: Fixed lpc32xx_mlc_is_bad_page().
* make/custom/lpc32xx.inc, make/custom/lpc32xx_mzx_stage_1.cfg: Flags
for EABI tool chain.
* configure.ac, include/bsp.h, include/lpc32xx.h, misc/emc.c,
misc/i2c.c, rtc/rtc-config.c, startup/bspstarthooks.c: Avoid compile
time ARM_CLK and HCLK.
Diffstat (limited to 'c/src/lib/libbsp/arm/lpc32xx/include')
-rw-r--r-- | c/src/lib/libbsp/arm/lpc32xx/include/bsp.h | 40 | ||||
-rw-r--r-- | c/src/lib/libbsp/arm/lpc32xx/include/lpc32xx.h | 6 | ||||
-rw-r--r-- | c/src/lib/libbsp/arm/lpc32xx/include/nand-mlc.h | 19 |
3 files changed, 57 insertions, 8 deletions
diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/bsp.h b/c/src/lib/libbsp/arm/lpc32xx/include/bsp.h index 7b904b7b0a..74627ae4df 100644 --- a/c/src/lib/libbsp/arm/lpc32xx/include/bsp.h +++ b/c/src/lib/libbsp/arm/lpc32xx/include/bsp.h @@ -7,12 +7,13 @@ */ /* - * Copyright (c) 2009, 2010 - * embedded brains GmbH - * Obere Lagerstr. 30 - * D-82178 Puchheim - * Germany - * <rtems@embedded-brains.de> + * Copyright (c) 2009-2011 embedded brains GmbH. All rights reserved. + * + * embedded brains GmbH + * Obere Lagerstr. 30 + * 82178 Puchheim + * Germany + * <rtems@embedded-brains.de> * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at @@ -110,6 +111,33 @@ static inline void lpc32xx_micro_seconds_delay(unsigned us) } while (elapsed < delay); } +#if LPC32XX_OSCILLATOR_MAIN == 13000000U + #define LPC32XX_HCLKPLL_CTRL_INIT_VALUE \ + (HCLK_PLL_POWER | HCLK_PLL_DIRECT | HCLK_PLL_M(16 - 1)) + #define LPC32XX_HCLKDIV_CTRL_INIT_VALUE \ + (HCLK_DIV_HCLK(2 - 1) | HCLK_DIV_PERIPH_CLK(16 - 1) | HCLK_DIV_DDRAM_CLK(1)) +#else + #error "unexpected main oscillator frequency" +#endif + +bool lpc32xx_start_pll_setup( + uint32_t hclkpll_ctrl, + uint32_t hclkdiv_ctrl, + bool force +); + +uint32_t lpc32xx_sysclk(void); + +uint32_t lpc32xx_hclkpll_clk(void); + +uint32_t lpc32xx_periph_clk(void); + +uint32_t lpc32xx_hclk(void); + +uint32_t lpc32xx_arm_clk(void); + +uint32_t lpc32xx_dram_clk(void); + void bsp_restart(void *addr); #define BSP_CONSOLE_UART_BASE LPC32XX_BASE_UART_5 diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/lpc32xx.h b/c/src/lib/libbsp/arm/lpc32xx/include/lpc32xx.h index b4ad928ca5..4a14c5626e 100644 --- a/c/src/lib/libbsp/arm/lpc32xx/include/lpc32xx.h +++ b/c/src/lib/libbsp/arm/lpc32xx/include/lpc32xx.h @@ -201,8 +201,11 @@ #define HCLK_PLL_LOCK BSP_BIT32(0) #define HCLK_PLL_M(val) BSP_FLD32(val, 1, 8) +#define HCLK_PLL_M_GET(reg) BSP_FLD32GET(reg, 1, 8) #define HCLK_PLL_N(val) BSP_FLD32(val, 9, 10) +#define HCLK_PLL_N_GET(reg) BSP_FLD32GET(reg, 9, 10) #define HCLK_PLL_P(val) BSP_FLD32(val, 11, 12) +#define HCLK_PLL_P_GET(reg) BSP_FLD32GET(reg, 11, 12) #define HCLK_PLL_FBD_FCLKOUT BSP_BIT32(13) #define HCLK_PLL_DIRECT BSP_BIT32(14) #define HCLK_PLL_BYPASS BSP_BIT32(15) @@ -217,8 +220,11 @@ */ #define HCLK_DIV_HCLK(val) BSP_FLD32(val, 0, 1) +#define HCLK_DIV_HCLK_GET(reg) BSP_FLD32GET(reg, 0, 1) #define HCLK_DIV_PERIPH_CLK(val) BSP_FLD32(val, 2, 6) +#define HCLK_DIV_PERIPH_CLK_GET(reg) BSP_FLD32GET(reg, 2, 6) #define HCLK_DIV_DDRAM_CLK(val) BSP_FLD32(val, 7, 8) +#define HCLK_DIV_DDRAM_CLK_GET(reg) BSP_FLD32GET(reg, 7, 8) /** @} */ diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/nand-mlc.h b/c/src/lib/libbsp/arm/lpc32xx/include/nand-mlc.h index 61d035bb94..cc91a7956b 100644 --- a/c/src/lib/libbsp/arm/lpc32xx/include/nand-mlc.h +++ b/c/src/lib/libbsp/arm/lpc32xx/include/nand-mlc.h @@ -392,10 +392,25 @@ rtems_status_code lpc32xx_mlc_read_blocks( uint32_t page_buffer_1 [MLC_LARGE_DATA_WORD_COUNT] ); +/** + * @brief Checks if the page spare area indicates to a bad page. + * + * If the first (byte offset 0) or sixth (byte offset 5) byte of the spare area + * has a value other than 0xff, then it returns @true (the page is bad), else + * it returns @a false (the page is not bad). + * + * Samsung uses the sixth byte to indicate a bad page. Mircon uses the first + * and sixth byte to indicate a bad page. + * + * This functions works only for small page flashes. + */ static inline bool lpc32xx_mlc_is_bad_page(const uint32_t *spare) { - uint32_t valid_block_mask = 0xff00; - return (spare [1] & valid_block_mask) != valid_block_mask; + uint32_t first_byte_mask = 0x000000ff; + uint32_t sixth_byte_mask = 0x0000ff00; + + return (spare [0] & first_byte_mask) != first_byte_mask + || (spare [1] & sixth_byte_mask) != sixth_byte_mask; } /** @} */ |