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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2012-03-14 16:45:26 +0100 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2012-03-14 16:45:26 +0100 |
commit | 4868c7718f0d8d4a6afe506be22c3cc37251238b (patch) | |
tree | aba7d763568cdd32aec1277c62344365fcc724ff /c/src/lib/libbsp/arm/lpc24xx/startup/start-config-emc-static.c | |
parent | PR2040: libtests/flashdisk01: New test (diff) | |
download | rtems-4868c7718f0d8d4a6afe506be22c3cc37251238b.tar.bz2 |
bsp/lpc24xx: New BSP variant
Diffstat (limited to '')
-rw-r--r-- | c/src/lib/libbsp/arm/lpc24xx/startup/start-config-emc-static.c | 34 |
1 files changed, 32 insertions, 2 deletions
diff --git a/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-emc-static.c b/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-emc-static.c index c0c541038d..b4d4566013 100644 --- a/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-emc-static.c +++ b/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-emc-static.c @@ -27,7 +27,7 @@ BSP_START_DATA_SECTION const lpc24xx_emc_static_chip_config lpc24xx_start_config_emc_static_chip [] = { -#if defined(LPC24XX_EMC_NUMONYX_M29W160E) +#if defined(LPC24XX_EMC_M29W160E) /* * Static Memory 1: Numonyx M29W160EB * @@ -66,8 +66,38 @@ BSP_START_DATA_SECTION const lpc24xx_emc_static_chip_config .waitrun = 0xf } } +#elif defined(LPC24XX_EMC_M29W320E70) + /* Static Memory 0: M29W320E70 at 51612800Hz (tCK = 19.4ns) */ + { + .chip_select = (volatile lpc_emc_static *) EMC_STA_BASE_0, + .config = { + /* + * 16 bit, page mode disabled, active LOW chip select, extended wait + * disabled, writes not protected, byte lane state LOW/LOW. + */ + .config = 0x81, + + /* (n + 1) clock cycles -> 38.8ns >= 30ns (tWHWL) */ + .waitwen = 1, + + /* (n + 1) clock cycles -> 19.4ns >= 0ns */ + .waitoen = 0, + + /* (n + 1) clock cycles -> 77.5ns >= 70ns (tAVQV, tELQV) */ + .waitrd = 3, + + /* (n + 1) clock cycles -> 77.5ns >= 70ns (tAVQV, tELQV) */ + .waitpage = 3, + + /* (n + 2) clock cycles -> 58.1ns >= 45ns (tWLWH) */ + .waitwr = 1, + + /* (n + 1) clock cycles -> 38.8ns >= 25ns (tEHQZ) */ + .waitrun = 1 + } + } #elif defined(LPC24XX_EMC_SST39VF3201) - /* Static Memory 1: SST SST39VF3201 at 51612800Hz (tCK = 19.4ns) */ + /* Static Memory 0: SST39VF3201 at 51612800Hz (tCK = 19.4ns) */ { .chip_select = (volatile lpc_emc_static *) EMC_STA_BASE_0, .config = { |