bsps: Shared ARMv7-M interrupt support

2 files changed, 47 insertions, 79 deletions

diff --git a/c/src/lib/libbsp/arm/lpc24xx/irq/irq-dispatch.c b/c/src/lib/libbsp/arm/lpc24xx/irq/irq-dispatch.c
index 94c346c76d..2f8a23c576 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/irq/irq-dispatch.c
+++ b/c/src/lib/libbsp/arm/lpc24xx/irq/irq-dispatch.c
@@ -20,36 +20,29 @@
  * http://www.rtems.com/license/LICENSE.
  */
 
-#include <rtems/score/armv7m.h>
-
 #include <bsp.h>
 #include <bsp/irq.h>
 #include <bsp/irq-generic.h>
 #include <bsp/lpc24xx.h>
 
+#ifdef ARM_MULTILIB_ARCH_V4
+
 void bsp_interrupt_dispatch(void)
 {
-  #ifdef ARM_MULTILIB_ARCH_V4
-    /* Read current vector number */
-    rtems_vector_number vector = VICVectAddr;
+  /* Read current vector number */
+  rtems_vector_number vector = VICVectAddr;
 
-    /* Enable interrupts in program status register */
-    uint32_t psr = arm_status_irq_enable();
+  /* Enable interrupts in program status register */
+  uint32_t psr = arm_status_irq_enable();
 
-    /* Dispatch interrupt handlers */
-    bsp_interrupt_handler_dispatch(vector);
+  /* Dispatch interrupt handlers */
+  bsp_interrupt_handler_dispatch(vector);
 
-    /* Restore program status register */
-    arm_status_restore(psr);
+  /* Restore program status register */
+  arm_status_restore(psr);
 
-    /* Acknowledge interrupt */
-    VICVectAddr = 0;
-  #else
-    rtems_vector_number vector =
-      ARMV7M_SCB_ICSR_VECTACTIVE_GET(_ARMV7M_SCB->icsr);
-
-    _ARMV7M_Interrupt_service_enter();
-    bsp_interrupt_handler_dispatch(ARMV7M_IRQ_OF_VECTOR(vector));
-    _ARMV7M_Interrupt_service_leave();
-  #endif
+  /* Acknowledge interrupt */
+  VICVectAddr = 0;
 }
+
+#endif /* ARM_MULTILIB_ARCH_V4 */
diff --git a/c/src/lib/libbsp/arm/lpc24xx/irq/irq.c b/c/src/lib/libbsp/arm/lpc24xx/irq/irq.c
index 3009e3f052..f99ce46c99 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/irq/irq.c
+++ b/c/src/lib/libbsp/arm/lpc24xx/irq/irq.c
@@ -61,86 +61,61 @@ unsigned lpc24xx_irq_get_priority(rtems_vector_number vector)
   }
 }
 
+#ifdef ARM_MULTILIB_ARCH_V4
+
 rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
 {
-  #ifdef ARM_MULTILIB_ARCH_V4
-    VICIntEnable = 1U << vector;
-  #else
-    _ARMV7M_NVIC_Set_enable((int) vector);
-  #endif
+  VICIntEnable = 1U << vector;
 
   return RTEMS_SUCCESSFUL;
 }
 
 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
 {
-  #ifdef ARM_MULTILIB_ARCH_V4
-    VICIntEnClear = 1U << vector;
-  #else
-    _ARMV7M_NVIC_Clear_enable((int) vector);
-  #endif
+  VICIntEnClear = 1U << vector;
 
   return RTEMS_SUCCESSFUL;
 }
 
 rtems_status_code bsp_interrupt_facility_initialize(void)
 {
-  #ifdef ARM_MULTILIB_ARCH_V4
-    volatile uint32_t *addr = VICVectAddrBase;
-    volatile uint32_t *prio = VICVectPriorityBase;
-    rtems_vector_number i = 0;
-
-    /* Disable all interrupts */
-    VICIntEnClear = 0xffffffff;
+  volatile uint32_t *addr = VICVectAddrBase;
+  volatile uint32_t *prio = VICVectPriorityBase;
+  rtems_vector_number i = 0;
 
-    /* Clear all software interrupts */
-    VICSoftIntClear = 0xffffffff;
+  /* Disable all interrupts */
+  VICIntEnClear = 0xffffffff;
 
-    /* Use IRQ category */
-    VICIntSelect = 0;
+  /* Clear all software interrupts */
+  VICSoftIntClear = 0xffffffff;
 
-    for (i = BSP_INTERRUPT_VECTOR_MIN; i <= BSP_INTERRUPT_VECTOR_MAX; ++i) {
-      /* Use the vector address register to store the vector number */
-      addr [i] = i;
+  /* Use IRQ category */
+  VICIntSelect = 0;
 
-      /* Give vector lowest priority */
-      prio [i] = 15;
-    }
+  for (i = BSP_INTERRUPT_VECTOR_MIN; i <= BSP_INTERRUPT_VECTOR_MAX; ++i) {
+    /* Use the vector address register to store the vector number */
+    addr [i] = i;
 
-    /* Reset priority mask register */
-    VICSWPrioMask = 0xffff;
+    /* Give vector lowest priority */
+    prio [i] = 15;
+  }
 
-    /* Acknowledge interrupts for all priorities */
-    for (
-      i = LPC24XX_IRQ_PRIORITY_VALUE_MIN;
-      i <= LPC24XX_IRQ_PRIORITY_VALUE_MAX;
-      ++i
-    ) {
-      VICVectAddr = 0;
-    }
+  /* Reset priority mask register */
+  VICSWPrioMask = 0xffff;
 
-    /* Install the IRQ exception handler */
-    _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, arm_exc_interrupt, NULL);
-  #else
-    rtems_vector_number i = 0;
-    ARMV7M_Exception_handler *vector_table =
-      (ARMV7M_Exception_handler *) bsp_vector_table_begin;
-
-    memcpy(
-      vector_table,
-      bsp_start_vector_table_begin,
-      (size_t) bsp_vector_table_size
-    );
-
-    for (i = BSP_INTERRUPT_VECTOR_MIN; i <= BSP_INTERRUPT_VECTOR_MAX; ++i) {
-      vector_table [ARMV7M_VECTOR_IRQ(i)] = bsp_interrupt_dispatch;
-      _ARMV7M_NVIC_Clear_enable(i);
-      _ARMV7M_NVIC_Clear_pending(i);
-      lpc24xx_irq_set_priority(i, LPC24XX_IRQ_PRIORITY_VALUE_MAX - 1);
-    }
+  /* Acknowledge interrupts for all priorities */
+  for (
+    i = LPC24XX_IRQ_PRIORITY_VALUE_MIN;
+    i <= LPC24XX_IRQ_PRIORITY_VALUE_MAX;
+    ++i
+  ) {
+    VICVectAddr = 0;
+  }
 
-    _ARMV7M_SCB->vtor = vector_table;
-  #endif
+  /* Install the IRQ exception handler */
+  _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, arm_exc_interrupt, NULL);
 
   return RTEMS_SUCCESSFUL;
 }
+
+#endif /* ARM_MULTILIB_ARCH_V4 */