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authorSebastian Huber <sebastian.huber@embedded-brains.de>2012-02-11 21:10:12 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2012-02-11 21:11:30 +0100
commit14ee5a1e220fb6bf08ebd36ffb0982dca4515cdb (patch)
tree905beccc8a453e66132ba67db47f0fb23f92834e /c/src/lib/libbsp/arm/lpc24xx/include
parentUse proper ARMv7-M compiler flags. (diff)
downloadrtems-14ee5a1e220fb6bf08ebd36ffb0982dca4515cdb.tar.bz2
Support for NXP LPC1700 family
Diffstat (limited to 'c/src/lib/libbsp/arm/lpc24xx/include')
-rw-r--r--c/src/lib/libbsp/arm/lpc24xx/include/bsp.h4
-rw-r--r--c/src/lib/libbsp/arm/lpc24xx/include/io.h102
-rw-r--r--c/src/lib/libbsp/arm/lpc24xx/include/irq.h47
-rw-r--r--c/src/lib/libbsp/arm/lpc24xx/include/lcd.h12
-rw-r--r--c/src/lib/libbsp/arm/lpc24xx/include/start-config.h7
5 files changed, 167 insertions, 5 deletions
diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/bsp.h b/c/src/lib/libbsp/arm/lpc24xx/include/bsp.h
index c96406d6b0..cd63737e81 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/include/bsp.h
+++ b/c/src/lib/libbsp/arm/lpc24xx/include/bsp.h
@@ -7,7 +7,7 @@
*/
/*
- * Copyright (c) 2008-2011 embedded brains GmbH. All rights reserved.
+ * Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Obere Lagerstr. 30
@@ -41,6 +41,8 @@ extern "C" {
#define LPC24XX_EMCCLK (LPC24XX_CCLK / LPC24XX_EMCCLKDIV)
+#define LPC24XX_MPU_REGION_COUNT 8
+
#ifndef ASM
struct rtems_bsdnet_ifconfig;
diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/io.h b/c/src/lib/libbsp/arm/lpc24xx/include/io.h
index b40bfdde6b..f798f54768 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/include/io.h
+++ b/c/src/lib/libbsp/arm/lpc24xx/include/io.h
@@ -7,7 +7,7 @@
*/
/*
- * Copyright (c) 2009-2011 embedded brains GmbH. All rights reserved.
+ * Copyright (c) 2009-2012 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Obere Lagerstr. 30
@@ -72,15 +72,24 @@ typedef enum {
LPC24XX_MODULE_I2S,
LPC24XX_MODULE_LCD,
LPC24XX_MODULE_MCI,
+ #ifdef ARM_MULTILIB_ARCH_V7M
+ LPC24XX_MODULE_MCPWM,
+ #endif
LPC24XX_MODULE_PCB,
LPC24XX_MODULE_PWM_0,
LPC24XX_MODULE_PWM_1,
+ #ifdef ARM_MULTILIB_ARCH_V7M
+ LPC24XX_MODULE_QEI,
+ #endif
LPC24XX_MODULE_RTC,
#ifdef ARM_MULTILIB_ARCH_V4
LPC24XX_MODULE_SPI,
#endif
LPC24XX_MODULE_SSP_0,
LPC24XX_MODULE_SSP_1,
+ #ifdef ARM_MULTILIB_ARCH_V7M
+ LPC24XX_MODULE_SSP_2,
+ #endif
LPC24XX_MODULE_SYSCON,
LPC24XX_MODULE_TIMER_0,
LPC24XX_MODULE_TIMER_1,
@@ -90,6 +99,9 @@ typedef enum {
LPC24XX_MODULE_UART_1,
LPC24XX_MODULE_UART_2,
LPC24XX_MODULE_UART_3,
+ #ifdef ARM_MULTILIB_ARCH_V7M
+ LPC24XX_MODULE_UART_4,
+ #endif
#ifdef ARM_MULTILIB_ARCH_V4
LPC24XX_MODULE_WDT,
#endif
@@ -115,6 +127,14 @@ typedef enum {
LPC24XX_GPIO_RESISTOR_NONE = 0x1U,
LPC24XX_GPIO_RESISTOR_PULL_DOWN = 0x2U,
LPC24XX_GPIO_INPUT = 0x0U,
+ #ifdef ARM_MULTILIB_ARCH_V7M
+ LPC17XX_GPIO_REPEATER = 0x3U,
+ LPC17XX_GPIO_HYSTERESIS = IOCON_HYS,
+ LPC17XX_GPIO_INPUT_INVERT = IOCON_INV,
+ LPC17XX_GPIO_FAST_MODE = IOCON_SLEW,
+ LPC17XX_GPIO_OPEN_DRAIN = IOCON_OD,
+ LPC17XX_GPIO_INPUT_FILTER = IOCON_FILTER,
+ #endif
LPC24XX_GPIO_OUTPUT = 0x8000U
} lpc24xx_gpio_settings;
@@ -226,6 +246,11 @@ typedef enum {
#define LPC24XX_PIN_WITH_TYPE(p, i, f0, f1, t) { { p, i, f0, t, 0 } }
#define LPC24XX_PIN_RANGE(p, i, j, f0, f1) \
{ { p, i, f0, 0, 0 } }, { { p, j, f0, 0, 1 } }
+#else
+ #define LPC24XX_PIN(p, i, f0, f1) { { p, i, f1, 0, 0 } }
+ #define LPC24XX_PIN_WITH_TYPE(p, i, f0, f1, t) { { p, i, f1, t, 0 } }
+ #define LPC24XX_PIN_RANGE(p, i, j, f0, f1) \
+ { { p, i, f1, 0, 0 } }, { { p, j, f1, 0, 1 } }
#endif
#define LPC24XX_PIN_TERMINAL { { 0x7, 0x1f, 0x7, 0xf, 0x1 } }
@@ -796,6 +821,27 @@ rtems_status_code lpc24xx_pin_config(
/** @} */
+#ifdef ARM_MULTILIB_ARCH_V4
+
+/**
+ * @name SPI Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_SPI_SCK \
+ LPC24XX_PIN(0, 15, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_SPI_SSEL \
+ LPC24XX_PIN(0, 16, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_SPI_MISO \
+ LPC24XX_PIN(0, 17, LPC24XX_PIN_FUNCTION_11)
+#define LPC24XX_PIN_SPI_MOSI \
+ LPC24XX_PIN(0, 18, LPC24XX_PIN_FUNCTION_11)
+
+/** @} */
+
+#endif /* ARM_MULTILIB_ARCH_V4 */
+
/**
* @name SSP 0 Pins
*
@@ -868,6 +914,30 @@ rtems_status_code lpc24xx_pin_config(
/** @} */
+#ifdef ARM_MULTILIB_ARCH_V7M
+
+/**
+ * @name SSP 2 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_SSP_2_SCK_P1_0 \
+ LPC24XX_PIN(1, 0, LPC24XX_PIN_FUNCTION_00, 4)
+
+#define LPC24XX_PIN_SSP_2_SSEL_P1_8 \
+ LPC24XX_PIN(1, 8, LPC24XX_PIN_FUNCTION_00, 4)
+
+#define LPC24XX_PIN_SSP_2_MISO_P1_4 \
+ LPC24XX_PIN(1, 4, LPC24XX_PIN_FUNCTION_00, 4)
+
+#define LPC24XX_PIN_SSP_2_MOSI_P1_1 \
+ LPC24XX_PIN(1, 1, LPC24XX_PIN_FUNCTION_00, 4)
+
+/** @} */
+
+#endif /* ARM_MULTILIB_ARCH_V7M */
+
/**
* @name UART 0 Pins
*
@@ -948,6 +1018,36 @@ rtems_status_code lpc24xx_pin_config(
/** @} */
+#ifdef ARM_MULTILIB_ARCH_V7M
+
+/**
+ * @name UART 4 Pins
+ *
+ * @{
+ */
+
+#define LPC24XX_PIN_UART_4_TXD_P0_22 \
+ LPC24XX_PIN(0, 22, LPC24XX_PIN_FUNCTION_00, 3)
+#define LPC24XX_PIN_UART_4_TXD_P1_29 \
+ LPC24XX_PIN(1, 29, LPC24XX_PIN_FUNCTION_00, 5)
+#define LPC24XX_PIN_UART_4_TXD_P5_4 \
+ LPC24XX_PIN(5, 4, LPC24XX_PIN_FUNCTION_00, 4)
+
+#define LPC24XX_PIN_UART_4_RXD_P2_9 \
+ LPC24XX_PIN(2, 9, LPC24XX_PIN_FUNCTION_00, 3)
+#define LPC24XX_PIN_UART_4_RXD_P5_3 \
+ LPC24XX_PIN(5, 3, LPC24XX_PIN_FUNCTION_00, 4)
+
+#define LPC24XX_PIN_UART_4_OE_P0_21 \
+ LPC24XX_PIN(0, 21, LPC24XX_PIN_FUNCTION_00, 3)
+
+#define LPC24XX_PIN_UART_4_SCLK_P0_21 \
+ LPC24XX_PIN(0, 21, LPC24XX_PIN_FUNCTION_00, 5)
+
+#endif /* ARM_MULTILIB_ARCH_V7M */
+
+/** @} */
+
/**
* @name USB Port 1 Pins
*
diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/irq.h b/c/src/lib/libbsp/arm/lpc24xx/include/irq.h
index d82946d35d..60fdb34b8e 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/include/irq.h
+++ b/c/src/lib/libbsp/arm/lpc24xx/include/irq.h
@@ -7,7 +7,7 @@
*/
/*
- * Copyright (c) 2008-2011 embedded brains GmbH. All rights reserved.
+ * Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Obere Lagerstr. 30
@@ -72,11 +72,56 @@
#define LPC24XX_IRQ_I2S 31
#define BSP_INTERRUPT_VECTOR_MAX 31
+#else
+ #define LPC24XX_IRQ_WDT 0
+ #define LPC24XX_IRQ_TIMER_0 1
+ #define LPC24XX_IRQ_TIMER_1 2
+ #define LPC24XX_IRQ_TIMER_2 3
+ #define LPC24XX_IRQ_TIMER_3 4
+ #define LPC24XX_IRQ_UART_0 5
+ #define LPC24XX_IRQ_UART_1 6
+ #define LPC24XX_IRQ_UART_2 7
+ #define LPC24XX_IRQ_UART_3 8
+ #define LPC24XX_IRQ_PWM_1 9
+ #define LPC24XX_IRQ_I2C_0 10
+ #define LPC24XX_IRQ_I2C_1 11
+ #define LPC24XX_IRQ_I2C_2 12
+ #define LPC24XX_IRQ_SPI_SSP_0 14
+ #define LPC24XX_IRQ_SSP_1 15
+ #define LPC24XX_IRQ_PLL 16
+ #define LPC24XX_IRQ_RTC 17
+ #define LPC24XX_IRQ_EINT_0 18
+ #define LPC24XX_IRQ_EINT_1 19
+ #define LPC24XX_IRQ_EINT_2 20
+ #define LPC24XX_IRQ_EINT_3 21
+ #define LPC24XX_IRQ_ADC_0 22
+ #define LPC24XX_IRQ_BOD 23
+ #define LPC24XX_IRQ_USB 24
+ #define LPC24XX_IRQ_CAN 25
+ #define LPC24XX_IRQ_DMA 26
+ #define LPC24XX_IRQ_I2S 27
+ #define LPC24XX_IRQ_ETHERNET 28
+ #define LPC24XX_IRQ_SD_MMC 29
+ #define LPC24XX_IRQ_MCPWM 30
+ #define LPC24XX_IRQ_QEI 31
+ #define LPC24XX_IRQ_PLL_ALT 32
+ #define LPC24XX_IRQ_USB_ACTIVITY 33
+ #define LPC24XX_IRQ_CAN_ACTIVITY 34
+ #define LPC24XX_IRQ_UART_4 35
+ #define LPC24XX_IRQ_SSP_2 36
+ #define LPC24XX_IRQ_LCD 37
+ #define LPC24XX_IRQ_GPIO 38
+ #define LPC24XX_IRQ_PWM 39
+ #define LPC24XX_IRQ_EEPROM 40
+
+ #define BSP_INTERRUPT_VECTOR_MAX 40
#endif
#define LPC24XX_IRQ_PRIORITY_VALUE_MIN 0
#ifdef ARM_MULTILIB_ARCH_V4
#define LPC24XX_IRQ_PRIORITY_VALUE_MAX 15
+#else
+ #define LPC24XX_IRQ_PRIORITY_VALUE_MAX 31
#endif
#define LPC24XX_IRQ_PRIORITY_COUNT (LPC24XX_IRQ_PRIORITY_VALUE_MAX + 1)
#define LPC24XX_IRQ_PRIORITY_HIGHEST LPC24XX_IRQ_PRIORITY_VALUE_MIN
diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/lcd.h b/c/src/lib/libbsp/arm/lpc24xx/include/lcd.h
index 08f5a4476a..06ec86db3f 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/include/lcd.h
+++ b/c/src/lib/libbsp/arm/lpc24xx/include/lcd.h
@@ -7,7 +7,7 @@
*/
/*
- * Copyright (c) 2010-2011 embedded brains GmbH. All rights reserved.
+ * Copyright (c) 2010-2012 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Obere Lagerstr. 30
@@ -52,6 +52,16 @@ typedef enum {
LCD_MODE_TFT_16_BIT_1_5_5_5,
LCD_MODE_TFT_24_BIT,
LCD_MODE_DISABLED
+ #else
+ LCD_MODE_STN_4_BIT = 0x4,
+ LCD_MODE_STN_8_BIT = 0x6,
+ LCD_MODE_STN_DUAL_PANEL_4_BIT = 0x84,
+ LCD_MODE_STN_DUAL_PANEL_8_BIT = 0x86,
+ LCD_MODE_TFT_12_BIT_4_4_4 = 0x2e,
+ LCD_MODE_TFT_16_BIT_5_6_5 = 0x2c,
+ LCD_MODE_TFT_16_BIT_1_5_5_5 = 0x28,
+ LCD_MODE_TFT_24_BIT = 0x2a,
+ LCD_MODE_DISABLED = 0xff
#endif
} lpc24xx_lcd_mode;
diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/start-config.h b/c/src/lib/libbsp/arm/lpc24xx/include/start-config.h
index 3002b59a89..906ea1622a 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/include/start-config.h
+++ b/c/src/lib/libbsp/arm/lpc24xx/include/start-config.h
@@ -7,7 +7,7 @@
*/
/*
- * Copyright (c) 2011 embedded brains GmbH. All rights reserved.
+ * Copyright (c) 2011-2012 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Obere Lagerstr. 30
@@ -25,6 +25,8 @@
#ifndef LIBBSP_ARM_LPC24XX_START_CONFIG_H
#define LIBBSP_ARM_LPC24XX_START_CONFIG_H
+#include <rtems/score/armv7m.h>
+
#include <bsp.h>
#include <bsp/io.h>
#include <bsp/start.h>
@@ -90,6 +92,9 @@ extern BSP_START_DATA_SECTION const lpc24xx_emc_static_chip_config
extern BSP_START_DATA_SECTION const size_t
lpc24xx_start_config_emc_static_chip_count;
+extern BSP_START_DATA_SECTION const ARMV7M_MPU_Region
+ lpc24xx_start_config_mpu_regions [LPC24XX_MPU_REGION_COUNT];
+
#ifdef __cplusplus
}
#endif /* __cplusplus */