* README: Added NCS.

	* Makefile.am, configure.ac, preinstall.am: Added BSP variants.
	* console/console-config.c, clock/clock-config.c, ssp/ssp.c: Fixed
	register settings.  Cleanup.
	* include/bsp.h: Added network defines and functions.
	* include/lpc24xx.h: Added AHB and EMC defines.  Fixed Ethernet status
	sizes.
	* include/system-clocks.h, misc/system-clocks.c: Added micro seconds
	delay function that uses Timer 1.  Changed PLL setup.
	* network/network.c, startup/bspreset.c, startup/linkcmds.lpc2478,
	startup/linkcmds.lpc2478_ncs, startup/linkcmds.lpc2478_ncs_ram: New
	files.
	* startup/bspstart.c: Added EMC initialization.  Changes for ROM boot.

1 files changed, 87 insertions, 4 deletions

diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h b/c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h
index 4719d30c3e..bb538cb487 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h
+++ b/c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h
@@ -1854,14 +1854,13 @@ typedef struct {
 typedef struct {
   uint32_t status;
   uint32_t hash_crc;
-} lpc24xx_eth_transfer_status;
+} lpc24xx_eth_receive_info;
 
 #define ETH_TRANSFER_DESCRIPTOR_SIZE 8
 
-#define ETH_TRANSFER_STATUS_SIZE 8
+#define ETH_RECEIVE_INFO_SIZE 8
 
-#define ETH_TRANSFER_CTRL_SIZE \
-  (ETH_TRANSFER_DESCRIPTOR_SIZE + ETH_TRANSFER_STATUS_SIZE)
+#define ETH_TRANSMIT_STATUS_SIZE 4
 
 /* ETH_RX_CTRL */
 
@@ -2023,4 +2022,88 @@ typedef struct {
 
 #define ETH_CMD_FULL_DUPLEX 0x00000400U
 
+/* AHBCFG */
+
+#define AHBCFG_SCHEDULER_UNIFORM 0x00000001U
+
+#define AHBCFG_BREAK_BURST_MASK 0x00000006U
+
+#define GET_AHBCFG_BREAK_BURST( reg) \
+  GET_FIELD( reg, AHBCFG_BREAK_BURST_MASK, 1)
+
+#define SET_AHBCFG_BREAK_BURST( reg, val) \
+  SET_FIELD( reg, val, AHBCFG_BREAK_BURST_MASK, 1)
+
+#define AHBCFG_QUANTUM_BUS_CYCLE 0x00000008U
+
+#define AHBCFG_QUANTUM_SIZE_MASK 0x000000f0U
+
+#define GET_AHBCFG_QUANTUM_SIZE( reg) \
+  GET_FIELD( reg, AHBCFG_QUANTUM_SIZE_MASK, 4)
+
+#define SET_AHBCFG_QUANTUM_SIZE( reg, val) \
+  SET_FIELD( reg, val, AHBCFG_QUANTUM_SIZE_MASK, 4)
+
+#define AHBCFG_DEFAULT_MASTER_MASK 0x00000700U
+
+#define GET_AHBCFG_DEFAULT_MASTER( reg) \
+  GET_FIELD( reg, AHBCFG_DEFAULT_MASTER_MASK, 8)
+
+#define SET_AHBCFG_DEFAULT_MASTER( reg, val) \
+  SET_FIELD( reg, val, AHBCFG_DEFAULT_MASTER_MASK, 8)
+
+#define AHBCFG_EP1_MASK 0x00007000U
+
+#define GET_AHBCFG_EP1( reg) \
+  GET_FIELD( reg, AHBCFG_EP1_MASK, 12)
+
+#define SET_AHBCFG_EP1( reg, val) \
+  SET_FIELD( reg, val, AHBCFG_EP1_MASK, 12)
+
+#define AHBCFG_EP2_MASK 0x00070000U
+
+#define GET_AHBCFG_EP2( reg) \
+  GET_FIELD( reg, AHBCFG_EP2_MASK, 16)
+
+#define SET_AHBCFG_EP2( reg, val) \
+  SET_FIELD( reg, val, AHBCFG_EP2_MASK, 16)
+
+#define AHBCFG_EP3_MASK 0x00700000U
+
+#define GET_AHBCFG_EP3( reg) \
+  GET_FIELD( reg, AHBCFG_EP3_MASK, 20)
+
+#define SET_AHBCFG_EP3( reg, val) \
+  SET_FIELD( reg, val, AHBCFG_EP3_MASK, 20)
+
+#define AHBCFG_EP4_MASK 0x07000000U
+
+#define GET_AHBCFG_EP4( reg) \
+  GET_FIELD( reg, AHBCFG_EP4_MASK, 24)
+
+#define SET_AHBCFG_EP4( reg, val) \
+  SET_FIELD( reg, val, AHBCFG_EP4_MASK, 24)
+
+#define AHBCFG_EP5_MASK 0x70000000U
+
+#define GET_AHBCFG_EP5( reg) \
+  GET_FIELD( reg, AHBCFG_EP5_MASK, 28)
+
+#define SET_AHBCFG_EP5( reg, val) \
+  SET_FIELD( reg, val, AHBCFG_EP5_MASK, 28)
+
+/* EMC */
+
+#define EMC_DYN_CTRL_CE 0x00000001U
+
+#define EMC_DYN_CTRL_CS 0x00000002U
+
+#define EMC_DYN_CTRL_CMD_NORMAL 0x00000000U
+
+#define EMC_DYN_CTRL_CMD_MODE 0x00000080U
+
+#define EMC_DYN_CTRL_CMD_PALL 0x00000100U
+
+#define EMC_DYN_CTRL_CMD_NOP 0x00000180U
+
 #endif /* LIBBSP_ARM_LPC24XX_LPC24XX_H */