bsp/imx: New BSP

Update #3090.

6 files changed, 248 insertions, 0 deletions

diff --git a/c/src/lib/libbsp/arm/imx/startup/bspreset.c b/c/src/lib/libbsp/arm/imx/startup/bspreset.c
new file mode 100644
index 0000000000..5d0ffe78a4
--- /dev/null
+++ b/c/src/lib/libbsp/arm/imx/startup/bspreset.c
@@ -0,0 +1,20 @@
+/*
+ * Copyright (c) 2017 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <info@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <bsp/bootcard.h>
+
+void bsp_reset(void)
+{
+  /* TODO */
+}
diff --git a/c/src/lib/libbsp/arm/imx/startup/bspsmp.c b/c/src/lib/libbsp/arm/imx/startup/bspsmp.c
new file mode 100644
index 0000000000..ac9561db05
--- /dev/null
+++ b/c/src/lib/libbsp/arm/imx/startup/bspsmp.c
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2017 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <info@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems/score/smpimpl.h>
+
+uint32_t _CPU_SMP_Initialize(void)
+{
+  return 1;
+}
+
+bool _CPU_SMP_Start_processor(uint32_t cpu_index)
+{
+  (void) cpu_index;
+
+  /* Nothing to do */
+
+  return true;
+}
+
+void _CPU_SMP_Finalize_initialization(uint32_t cpu_count)
+{
+}
+
+void _CPU_SMP_Prepare_start_multitasking(void)
+{
+}
+
+void _CPU_SMP_Send_interrupt(uint32_t target_processor_index)
+{
+}
diff --git a/c/src/lib/libbsp/arm/imx/startup/bspstart.c b/c/src/lib/libbsp/arm/imx/startup/bspstart.c
new file mode 100644
index 0000000000..eb2ba29a3e
--- /dev/null
+++ b/c/src/lib/libbsp/arm/imx/startup/bspstart.c
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2017 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <info@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <bsp.h>
+#include <bsp/bootcard.h>
+#include <bsp/fatal.h>
+#include <bsp/fdt.h>
+#include <bsp/irq-generic.h>
+
+#include <libfdt.h>
+
+uint32_t bsp_fdt_map_intr(uint32_t intr)
+{
+  return intr + 32;
+}
+
+void arm_generic_timer_get_config(
+  uint32_t *frequency,
+  uint32_t *irq
+)
+{
+  const void *fdt;
+  int node;
+  int len;
+  const uint32_t *val;
+
+  fdt = bsp_fdt_get();
+  node = fdt_path_offset(fdt, "/timer");
+
+  val = fdt_getprop(fdt, node, "clock-frequency", &len);
+  if (val != NULL && len >= 4) {
+    *frequency = fdt32_to_cpu(val[0]);
+  } else {
+    bsp_fatal(IMX_FATAL_GENERIC_TIMER_FREQUENCY);
+  }
+
+  val = fdt_getprop(fdt, node, "interrupts", &len);
+  if (val != NULL && len >= 8) {
+    /* FIXME: Figure out how Linux gets a proper IRQ number */
+    *irq = 16 + fdt32_to_cpu(val[1]);
+  } else {
+    bsp_fatal(IMX_FATAL_GENERIC_TIMER_IRQ);
+  }
+}
+
+void bsp_start(void)
+{
+  bsp_interrupt_initialize();
+}
diff --git a/c/src/lib/libbsp/arm/imx/startup/bspstarthooks.c b/c/src/lib/libbsp/arm/imx/startup/bspstarthooks.c
new file mode 100644
index 0000000000..2bbbae06df
--- /dev/null
+++ b/c/src/lib/libbsp/arm/imx/startup/bspstarthooks.c
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2013, 2017 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <info@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#define ARM_CP15_TEXT_SECTION BSP_START_TEXT_SECTION
+
+#include <bsp.h>
+#include <bsp/start.h>
+#include <bsp/arm-cp15-start.h>
+#include <bsp/arm-a9mpcore-start.h>
+
+BSP_START_DATA_SECTION static const arm_cp15_start_section_config
+imx_mmu_config_table[] = {
+  ARMV7_CP15_START_DEFAULT_SECTIONS,
+  {
+    .begin = 0x07000000U,
+    .end = 0x70000000U,
+    .flags = ARMV7_MMU_DEVICE
+  }
+};
+
+BSP_START_TEXT_SECTION static void setup_mmu_and_cache(void)
+{
+  uint32_t ctrl = arm_cp15_start_setup_mmu_and_cache(
+    ARM_CP15_CTRL_A,
+    ARM_CP15_CTRL_AFE | ARM_CP15_CTRL_Z
+  );
+
+  arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache(
+    ctrl,
+    (uint32_t *) bsp_translation_table_base,
+    ARM_MMU_DEFAULT_CLIENT_DOMAIN,
+    &imx_mmu_config_table[0],
+    RTEMS_ARRAY_SIZE(imx_mmu_config_table)
+  );
+}
+
+BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
+{
+}
+
+BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
+{
+  arm_a9mpcore_start_set_vector_base();
+  bsp_start_copy_sections();
+  setup_mmu_and_cache();
+  bsp_start_clear_bss();
+}
diff --git a/c/src/lib/libbsp/arm/imx/startup/ccm.c b/c/src/lib/libbsp/arm/imx/startup/ccm.c
new file mode 100644
index 0000000000..bbb72db639
--- /dev/null
+++ b/c/src/lib/libbsp/arm/imx/startup/ccm.c
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2017 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <info@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <stdint.h>
+#include <bspopts.h>
+
+#include <arm/freescale/imx/imx_ccmvar.h>
+
+uint32_t imx_ccm_ipg_hz(void)
+{
+  return IMX_CCM_IPG_HZ;
+}
+
+uint32_t imx_ccm_uart_hz(void)
+{
+  return IMX_CCM_UART_HZ;
+}
+
+uint32_t imx_ccm_ahb_hz(void)
+{
+  return IMX_CCM_AHB_HZ;
+}
diff --git a/c/src/lib/libbsp/arm/imx/startup/linkcmds.imx7 b/c/src/lib/libbsp/arm/imx/startup/linkcmds.imx7
new file mode 100644
index 0000000000..6cb9fc3f39
--- /dev/null
+++ b/c/src/lib/libbsp/arm/imx/startup/linkcmds.imx7
@@ -0,0 +1,36 @@
+MEMORY {
+	RAM_MMU : ORIGIN = 0x80000000, LENGTH = 16k
+	RAM : ORIGIN = 0x80004000, LENGTH = 512M - 16k
+}
+
+REGION_ALIAS ("REGION_START", RAM);
+REGION_ALIAS ("REGION_VECTOR", RAM);
+REGION_ALIAS ("REGION_TEXT", RAM);
+REGION_ALIAS ("REGION_TEXT_LOAD", RAM);
+REGION_ALIAS ("REGION_RODATA", RAM);
+REGION_ALIAS ("REGION_RODATA_LOAD", RAM);
+REGION_ALIAS ("REGION_DATA", RAM);
+REGION_ALIAS ("REGION_DATA_LOAD", RAM);
+REGION_ALIAS ("REGION_FAST_TEXT", RAM);
+REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM);
+REGION_ALIAS ("REGION_FAST_DATA", RAM);
+REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM);
+REGION_ALIAS ("REGION_BSS", RAM);
+REGION_ALIAS ("REGION_WORK", RAM);
+REGION_ALIAS ("REGION_STACK", RAM);
+REGION_ALIAS ("REGION_NOCACHE", RAM);
+REGION_ALIAS ("REGION_NOCACHE_LOAD", RAM);
+
+bsp_processor_count = DEFINED (bsp_processor_count) ? bsp_processor_count : 2;
+
+bsp_stack_irq_size = DEFINED (bsp_stack_irq_size) ? bsp_stack_irq_size : 4096;
+bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024;
+
+bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M;
+
+bsp_vector_table_in_start_section = 1;
+
+bsp_translation_table_base = ORIGIN (RAM_MMU);
+bsp_translation_table_end = ORIGIN (RAM_MMU) + LENGTH (RAM_MMU);
+
+INCLUDE linkcmds.armv4