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| author | Aun-Ali Zaidi <admin@kodeit.net> | 2015-12-12 22:24:16 -0600 |
|---|---|---|
| committer | Gedare Bloom <gedare@rtems.org> | 2015-12-13 08:39:14 -0500 |
| commit | f2a228b2cb5ce376c56ae8d767084b92f2822af0 (patch) | |
| tree | bfb4594bd761af7a4c35bc6163bf9d30bea46954 /c/src/lib/libbsp/arm/gp32/startup/memmap.c | |
| parent | Store task_id of the current thread for the ISR before waiting for the transi... (diff) | |
| download | rtems-f2a228b2cb5ce376c56ae8d767084b92f2822af0.tar.bz2 | |
arm/gp32: Remove
updates #2451.
Diffstat (limited to '')
| -rw-r--r-- | c/src/lib/libbsp/arm/gp32/startup/memmap.c | 25 |
1 files changed, 0 insertions, 25 deletions
diff --git a/c/src/lib/libbsp/arm/gp32/startup/memmap.c b/c/src/lib/libbsp/arm/gp32/startup/memmap.c deleted file mode 100644 index fec8a50369..0000000000 --- a/c/src/lib/libbsp/arm/gp32/startup/memmap.c +++ /dev/null @@ -1,25 +0,0 @@ -/* - * GP32 Memory Map - * - * Copyright (c) 2004 by Cogent Computer Systems - * Written by Jay Monkman <jtm@lopingdog.com> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ -#include <rtems.h> -#include <libcpu/mmu.h> - -/* Remember, the ARM920 has 64 TLBs. If you have more 1MB sections than - * that, you'll have TLB lookups, which could hurt performance. - */ -mmu_sect_map_t mem_map[] = { -/* <phys addr> <virt addr> <size> <flags> */ - {0x0c000000, 0x00000000, 1, MMU_CACHE_NONE}, /* SDRAM for vectors */ - {0x0c000000, 0x0c000000, 7, MMU_CACHE_WTHROUGH}, /* SDRAM W cache */ - {0x0c700000, 0x0c700000, 1, MMU_CACHE_NONE}, /* SDRAM W/O cache */ - {0x14000000, 0x14000000, 16, MMU_CACHE_NONE}, /* Internals Regs - */ - {0x15000000, 0x15000000, 16, MMU_CACHE_NONE}, /* Internal Regs - */ - {0x00000000, 0x00000000, 0, 0} /* The end */ -}; |