Whitespace removal.

10 files changed, 150 insertions, 150 deletions

diff --git a/c/src/lib/libbsp/arm/csb337/console/fbcons.c b/c/src/lib/libbsp/arm/csb337/console/fbcons.c
index a0967d1932..54e309c52d 100644
--- a/c/src/lib/libbsp/arm/csb337/console/fbcons.c
+++ b/c/src/lib/libbsp/arm/csb337/console/fbcons.c
@@ -30,8 +30,8 @@ static void    fbcons_write_polled(int minor, char c);
 static int     fbcons_set_attributes(int minor, const struct termios *t);
 
 /* Pointers to functions for handling the UART. */
-console_fns fbcons_fns = 
-{ 
+console_fns fbcons_fns =
+{
   libchip_serial_default_probe,
   fbcons_first_open,
   fbcons_last_close,
@@ -46,24 +46,24 @@ console_fns fbcons_fns =
 /* Functions called via callbacks (i.e. the ones in uart_fns */
 /*********************************************************************/
 
-/* 
+/*
  * This is called the first time each device is opened. Since
- * the driver is polled, we don't have to do anything. If the driver 
- * were interrupt driven, we'd enable interrupts here. 
+ * the driver is polled, we don't have to do anything. If the driver
+ * were interrupt driven, we'd enable interrupts here.
  */
-static int fbcons_first_open(int major, int minor, void *arg) 
+static int fbcons_first_open(int major, int minor, void *arg)
 {
   /* printk( "Frame buffer -- first open\n" ); */
   return 0;
 }
 
 
-/* 
+/*
  * This is called the last time each device is closed.  Since
- * the driver is polled, we don't have to do anything. If the driver 
- * were interrupt driven, we'd disable interrupts here. 
+ * the driver is polled, we don't have to do anything. If the driver
+ * were interrupt driven, we'd disable interrupts here.
  */
-static int fbcons_last_close(int major, int minor, void *arg) 
+static int fbcons_last_close(int major, int minor, void *arg)
 {
   /* printk( "Frame buffer -- last close\n" ); */
   return 0;
@@ -76,15 +76,15 @@ static int fbcons_last_close(int major, int minor, void *arg)
  * return -1 if there's no data, otherwise return
  * the character in lowest 8 bits of returned int.
  */
-static int fbcons_read(int minor) 
+static int fbcons_read(int minor)
 {
   /* printk( "Frame buffer -- read\n" ); */
   return -1;
 }
 
 
-/* 
- * Write buffer to LCD 
+/*
+ * Write buffer to LCD
  *
  * return 1 on success, -1 on error
  */
@@ -115,7 +115,7 @@ static void fbcons_write_polled(int minor, char c)
 }
 
 /* This is for setting baud rate, bits, etc. */
-static int fbcons_set_attributes(int minor, const struct termios *t) 
+static int fbcons_set_attributes(int minor, const struct termios *t)
 {
   /* printk( "frame buffer -- set attributes\n" ); */
   return 0;
@@ -127,7 +127,7 @@ static int fbcons_set_attributes(int minor, const struct termios *t)
  * functions use them instead.
  */
 /***********************************************************************/
-/* 
+/*
  * Read from UART. This is used in the exit code, and can't
  * rely on interrupts.
  */
diff --git a/c/src/lib/libbsp/arm/csb337/console/font8x16.h b/c/src/lib/libbsp/arm/csb337/console/font8x16.h
index 2dac5e66c3..87cb5b74ac 100755
--- a/c/src/lib/libbsp/arm/csb337/console/font8x16.h
+++ b/c/src/lib/libbsp/arm/csb337/console/font8x16.h
@@ -1,7 +1,7 @@
 /*
  * font8x16.h
  *
- * Simple 8 x 16 font printable characters only.  To lookoup, subtract 
+ * Simple 8 x 16 font printable characters only.  To lookoup, subtract
  * FIRST_CHAR from the character, multiply x FONT_HEIGHT and get the next
  * FONT_WIDTH bytes.
  *
@@ -38,7 +38,7 @@
 #define FONT_WIDTH		8
 #define FONT_HEIGHT 	16
 #define FIRST_CHAR 		0x20
-#define LAST_CHAR 		0x7f  
+#define LAST_CHAR 		0x7f
 #define CURSOR_ON  		0x7F
 #define CURSOR_OFF 		0x20
 
diff --git a/c/src/lib/libbsp/arm/csb337/console/sed1356.c b/c/src/lib/libbsp/arm/csb337/console/sed1356.c
index 84971cf0ef..7e81ff4b4a 100644
--- a/c/src/lib/libbsp/arm/csb337/console/sed1356.c
+++ b/c/src/lib/libbsp/arm/csb337/console/sed1356.c
@@ -83,7 +83,7 @@ void sed_scroll(void);
 #define SED1356_REG_LCD_DISP_START_LO_and_MID    SED_REG16(0x42)
 #define SED1356_REG_LCD_DISP_START_HI           SED_REG16(0x44)
 #define SED1356_REG_LCD_ADD_OFFSET_LO_and_HI    SED_REG16(0x46)
-#define SED1356_REG_LCD_PIXEL_PAN             SED_REG16(0x48)  
+#define SED1356_REG_LCD_PIXEL_PAN             SED_REG16(0x48)
 #define SED1356_REG_LCD_FIFO_THRESH_LO_and_HI    SED_REG16(0x4a)
 #endif
 
@@ -242,7 +242,7 @@ void sed_putchar(char c)
         sed_scroll();
       }
       break;
-  } 
+  }
 
 } /* sed_putchar() */
 
@@ -259,7 +259,7 @@ void sed_writechar(uint8_t c)
   uint8_t font_data8;
   uint16_t wr16;
 
-  /* Convert the current row,col and color depth values 
+  /* Convert the current row,col and color depth values
    * into an address
    */
   sed_mem_add = SED_GET_ADD(sed_row, sed_col, sed_color_depth);
@@ -277,8 +277,8 @@ void sed_writechar(uint8_t c)
         for (font_row = 0; font_row < FONT_HEIGHT; font_row++) {
           /* get the font row of data */
           font_data8 = font8x16[(c * FONT_HEIGHT) + font_row];
-    
-    
+
+
           for (font_col = 0; font_col < 8; font_col += 4)
           {
             /* get a words worth of pixels */
@@ -363,7 +363,7 @@ void sed_update_fb_offset(void)
 {
   /* write the new sed_fb_offset value */
   if (sed_disp_mode_crt) {
-  /* before we change the address offset, wait for the display to 
+  /* before we change the address offset, wait for the display to
    * go from active to non-active, unless the display is not enabled
    */
   if (SED1356_REG_DISP_MODE & H2SED(SED1356_DISP_MODE_CRT)) {  /* CRT is on */
@@ -453,7 +453,7 @@ void sed_clearscreen(void)
     /* 16-bits bypasses the lookup table */
     default: wr16 = vga_lookup[bg]; break;
   }
-  for (i = 0; i < fbsize; i += 2){  
+  for (i = 0; i < fbsize; i += 2){
     sed_write_frame_buffer(i, wr16);
   }
 }
diff --git a/c/src/lib/libbsp/arm/csb337/console/sed1356_16bit.h b/c/src/lib/libbsp/arm/csb337/console/sed1356_16bit.h
index 241060a4d7..3326480f44 100755
--- a/c/src/lib/libbsp/arm/csb337/console/sed1356_16bit.h
+++ b/c/src/lib/libbsp/arm/csb337/console/sed1356_16bit.h
@@ -37,9 +37,9 @@
 #include "bits.h"
 /*------------------------------------------------------------------------
  * cpu specific code must define the following board specific macros.
- * in cpuio.h.  These examples assume the SED135x has been placed in 
+ * in cpuio.h.  These examples assume the SED135x has been placed in
  * the correct endian mode via hardware.
- * #define SED_MEM_BASE   0xf0600000 <-- just example addresses, 
+ * #define SED_MEM_BASE   0xf0600000 <-- just example addresses,
  * #define SED_REG_BASE    0xf0400000 <-- define for each board
  * #define SED_STEP      1 <-- 1 = device is on 16-bit boundry, 2 = 32-bit boundry, 4 = 64-bit boundry
  * #define SED_REG16(_x_)    *(vushortr *)(SED_REG_BASE + (_x_ * SED_STEP))  // Control/Status Registers
@@ -80,7 +80,7 @@
 #define SED1356_REG_LCD_DISP_START_LO_and_MID    SED_REG16(0x42)
 #define SED1356_REG_LCD_DISP_START_HI           SED_REG16(0x44)
 #define SED1356_REG_LCD_ADD_OFFSET_LO_and_HI    SED_REG16(0x46)
-#define SED1356_REG_LCD_PIXEL_PAN             SED_REG16(0x48)  
+#define SED1356_REG_LCD_PIXEL_PAN             SED_REG16(0x48)
 #define SED1356_REG_LCD_FIFO_THRESH_LO_and_HI    SED_REG16(0x4a)
 /* CRT/TV Control registers */
 #define SED1356_REG_CRT_HOR_DISP                 SED_REG16(0x50)
@@ -100,7 +100,7 @@
 #define SED1356_REG_LCD_CURSOR_X_POS_LO_and_HI     SED_REG16(0x72)
 #define SED1356_REG_LCD_CURSOR_Y_POS_LO_and_HI    SED_REG16(0x74)
 #define SED1356_REG_LCD_CURSOR_BLUE_and_GREEN_CLR_0  SED_REG16(0x76)
-#define SED1356_REG_LCD_CURSOR_RED_CLR_0      SED_REG16(0x78)  
+#define SED1356_REG_LCD_CURSOR_RED_CLR_0      SED_REG16(0x78)
 #define SED1356_REG_LCD_CURSOR_BLUE_and_GREEN_CLR_1  SED_REG16(0x7a)
 #define SED1356_REG_LCD_CURSOR_RED_CLR_1      SED_REG16(0x7c)
 #define SED1356_REG_LCD_CURSOR_FIFO_THRESH      SED_REG16(0x7e)
@@ -152,8 +152,8 @@
 #define SED1356_GPIO_GPIO1           BIT1
 
 /* SED1356_REG_MCLK_CFG */
-#define SED1356_MCLK_DIV2          BIT4 
-#define SED1356_MCLK_SRC_BCLK        BIT0 
+#define SED1356_MCLK_DIV2          BIT4
+#define SED1356_MCLK_SRC_BCLK        BIT0
 #define SED1356_MCLK_SRC_CLKI        0x00
 
 /* SED1356_REG_LCD_PCLK_CFG, SED1356_REG_CRT_PCLK_CFG
@@ -170,11 +170,11 @@
 #define SED1356_PCLK_SRC_MCLK        0x03
 
 /* SED1356_REG_MEM_CFG_and_REF_RATE - even */
-#define SED1356_MEM_CFG_2CAS_EDO      0x00   
-#define SED1356_MEM_CFG_2CAS_FPM      0x01   
-#define SED1356_MEM_CFG_2WE_EDO        0x02   
-#define SED1356_MEM_CFG_2WE_FPM        0x03   
-#define SED1356_MEM_CFG_MASK        0x03   
+#define SED1356_MEM_CFG_2CAS_EDO      0x00
+#define SED1356_MEM_CFG_2CAS_FPM      0x01
+#define SED1356_MEM_CFG_2WE_EDO        0x02
+#define SED1356_MEM_CFG_2WE_FPM        0x03
+#define SED1356_MEM_CFG_MASK        0x03
 
 /* SED1356_REG_MEM_CFG_and_REF_RATE - odd */
 #define SED1356_REF_TYPE_CBR        0x00 << 6 << 8
@@ -236,7 +236,7 @@
 #define SED1356_MEM_TMG1_FPM80_MCLK20    0x01 << 8
 
 
-/* Bit definitions                         
+/* Bit definitions
  *
  * SED1356_REG_PANEL_TYPE_AND_MOD_RATE - even
  */
@@ -425,87 +425,87 @@ LU_BRT_WHITE      /* 15 */
 /* Vertical and Horizontal Pulse, Start and Non-Display values vary depending
  * upon the mode.  The following section gives some insight into how the
  * values are arrived at.
- * ms = milliseconds, us = microseconds, ns = nanoseconds    
- * Mhz = Megaherz, Khz = Kiloherz, Hz = Herz   
+ * ms = milliseconds, us = microseconds, ns = nanoseconds
+ * Mhz = Megaherz, Khz = Kiloherz, Hz = Herz
  *
- * ***************************************************************************************************   
+ * ***************************************************************************************************
  * CRT Mode is 640x480 @ 72Hz VESA compatible timing.  PCLK = 31.5Mhz (31.75ns)
- * ***************************************************************************************************   
+ * ***************************************************************************************************
  *
- *                               CRT MODE HORIZONTAL TIMING PARAMETERS   
+ *                               CRT MODE HORIZONTAL TIMING PARAMETERS
  *
- *                                       |<-------Tha------->|   
- *                                       |___________________|                     ______   
- * Display Enable   _____________________|                   |____________________|      
- *                                       |                   |   
- * Horizontal Pulse __           ________|___________________|________          __________   
- *                    |_________|        |                   |        |________|   
- *                    |<- Thp ->|        |                   |        |   
- *                    |         |<-Thbp->|                   |        |   
- *                    |                                      |<-Thfp->|   
- *                    |<----------------------Tht-------------------->|    
+ *                                       |<-------Tha------->|
+ *                                       |___________________|                     ______
+ * Display Enable   _____________________|                   |____________________|
+ *                                       |                   |
+ * Horizontal Pulse __           ________|___________________|________          __________
+ *                    |_________|        |                   |        |________|
+ *                    |<- Thp ->|        |                   |        |
+ *                    |         |<-Thbp->|                   |        |
+ *                    |                                      |<-Thfp->|
+ *                    |<----------------------Tht-------------------->|
  *
- * Tha  - Active Display Time                      = 640 pixels   
- * Thp  - Horizontal Pulse       = 1.27us/31.75ns  =  40 pixels   
- * Thbp - Horizontal Front Porch = 1.016us/31.75ns =  32 pixels   
- * Thfp - Horizontal Back Porch  = 3.8us/31.75ns   = 120 pixels   
- * Tht  - Total Horizontal Time                    = 832 pixels x 32.75ns/pixel = 26.416us or 38.785Khz   
+ * Tha  - Active Display Time                      = 640 pixels
+ * Thp  - Horizontal Pulse       = 1.27us/31.75ns  =  40 pixels
+ * Thbp - Horizontal Front Porch = 1.016us/31.75ns =  32 pixels
+ * Thfp - Horizontal Back Porch  = 3.8us/31.75ns   = 120 pixels
+ * Tht  - Total Horizontal Time                    = 832 pixels x 32.75ns/pixel = 26.416us or 38.785Khz
  *
- * Correlation between horizontal timing parameters and SED registers   
+ * Correlation between horizontal timing parameters and SED registers
  */
 #define SED_HOR_PULSE_WIDTH_CRT 0x07 /* Horizontal Pulse Width Register           = (Thp/8) - 1 */
 #define SED_HOR_PULSE_START_CRT  0x02 /* Horizontal Pulse Start Position Register    = ((Thfp + 2)/8) - 1 */
 #define SED_HOR_NONDISP_CRT    0x17 /* Horizontal Non-Display Period Register     = ((Thp + Thfp + Thbp)/8) - 1 */
 /*
- *                                CRT MODE VERTICAL TIMING PARAMTERS   
+ *                                CRT MODE VERTICAL TIMING PARAMTERS
  *
- *                                       |<-------Tva------->|   
- *                                       |___________________|                     ______   
- * Display Enable   _____________________|                   |_____________________|      
- *                                       |                   |   
- * Vertical Pulse   __           ________|___________________|________          __________   
- *                    |_________|        |                   |        |________|   
- *                    |<- Tvp ->|        |                   |        |   
- *                    |         |<-Tvbp->|                   |        |   
- *                    |                                      |<-Tvfp->|   
- *                    |<----------------------Tvt-------------------->|    
+ *                                       |<-------Tva------->|
+ *                                       |___________________|                     ______
+ * Display Enable   _____________________|                   |_____________________|
+ *                                       |                   |
+ * Vertical Pulse   __           ________|___________________|________          __________
+ *                    |_________|        |                   |        |________|
+ *                    |<- Tvp ->|        |                   |        |
+ *                    |         |<-Tvbp->|                   |        |
+ *                    |                                      |<-Tvfp->|
+ *                    |<----------------------Tvt-------------------->|
  *
- * Tva  - Active Display Time   = 480 lines   
- * Tvp  - Vertical Pulse        =  3 lines   
- * Tvfp - Vertical Front Porch  =   9 lines   
- * Tvbp - Vertical Back Porch   =  28 lines   
- * Tvt  - Total Horizontal Time = 520 lines x 26.416us/line = 13.73632ms or 72.8Hz   
+ * Tva  - Active Display Time   = 480 lines
+ * Tvp  - Vertical Pulse        =  3 lines
+ * Tvfp - Vertical Front Porch  =   9 lines
+ * Tvbp - Vertical Back Porch   =  28 lines
+ * Tvt  - Total Horizontal Time = 520 lines x 26.416us/line = 13.73632ms or 72.8Hz
  *
- * Correlation between vertical timing parameters and SED registers   
+ * Correlation between vertical timing parameters and SED registers
  */
 #define SED_VER_PULSE_WIDTH_CRT 0x02 // VRTC/FPFRAME Pulse Width Register    = Tvp - 1
-#define SED_VER_PULSE_START_CRT 0x08 // VRTC/FPFRAME Start Position Register = Tvfp - 1            
+#define SED_VER_PULSE_START_CRT 0x08 // VRTC/FPFRAME Start Position Register = Tvfp - 1
 #define SED_VER_NONDISP_CRT    0x27 // Vertical Non-Display Period Register = (Tvp + Tvfp + Tvbp) - 1
 /*
- *****************************************************************************************************   
+ *****************************************************************************************************
  * DUAL LCD Mode is 640x480 @ 60Hz VGA compatible timing.   PCLK = 25.175Mhz (39.722ns)
- *****************************************************************************************************   
+ *****************************************************************************************************
  *
- *                              LCD MODE HORIZONTAL TIMING PARAMTERS   
+ *                              LCD MODE HORIZONTAL TIMING PARAMTERS
  *
- *                                       |<-------Tha------->|   
- *                                       |___________________|                     ______   
- * Display Enable   _____________________|                   |____________________|      
- *                                       |                   |   
- * Horizontal Pulse __           ________|___________________|________          __________   
- *                    |_________|        |                   |        |________|   
- *                    |<- Thp ->|        |                   |        |   
- *                    |         |<-Thbp->|                   |        |   
- *                    |                                      |<-Thfp->|   
- *                    |<----------------------Tht-------------------->|    
+ *                                       |<-------Tha------->|
+ *                                       |___________________|                     ______
+ * Display Enable   _____________________|                   |____________________|
+ *                                       |                   |
+ * Horizontal Pulse __           ________|___________________|________          __________
+ *                    |_________|        |                   |        |________|
+ *                    |<- Thp ->|        |                   |        |
+ *                    |         |<-Thbp->|                   |        |
+ *                    |                                      |<-Thfp->|
+ *                    |<----------------------Tht-------------------->|
  *
- * Tha  - Active Display Time                     = 640 pixels   
- * Thp  - Horizontal Pulse       = 3.8us/39.72ns  =  96 pixels   
- * Thfp - Horizontal Front Porch = .595us/39.72ns =  16 pixels   
- * Thbp - Horizontal Backporch   = 1.9us/39.72ns  =  48 pixels   
- * Tht  - Total Horizontal Time  =                = 800 pixels @ 39.72ns/pixel = 31.776us or 31.47Khz   
+ * Tha  - Active Display Time                     = 640 pixels
+ * Thp  - Horizontal Pulse       = 3.8us/39.72ns  =  96 pixels
+ * Thfp - Horizontal Front Porch = .595us/39.72ns =  16 pixels
+ * Thbp - Horizontal Backporch   = 1.9us/39.72ns  =  48 pixels
+ * Tht  - Total Horizontal Time  =                = 800 pixels @ 39.72ns/pixel = 31.776us or 31.47Khz
  *
- * Correlation between horizontal timing parameters and SED registers   
+ * Correlation between horizontal timing parameters and SED registers
  *#define SED_HOR_PULSE_WIDTH_LCD 0x0b // HRTC/FPLINE Pulse Width Register       = (Thp/8) - 1
  *#define SED_HOR_PULSE_START_LCD  0x02 // HRTC/FPLINE Start Position Register    = (Thfp/8) - 2
  *#define SED_HOR_NONDISP_LCD   0x13 // Horizontal Non-Display Period Register = ((Thp + Thfp + Thbp)/8) - 1
@@ -516,28 +516,28 @@ extern long SED_HOR_NONDISP_LCD;
 
 /*
  *
- *                              LCD MODE VERTICAL TIMING PARAMTERS   
+ *                              LCD MODE VERTICAL TIMING PARAMTERS
  *
- *                                       |<-------Tva------->|   
- *                                       |___________________|                     ______   
- * Display Enable   _____________________|                   |_____________________|      
- *                                       |                   |   
- * Vertical Pulse   __           ________|___________________|________          __________   
- *                    |_________|        |                   |        |________|   
- *                    |<- Tvp ->|        |                   |        |   
- *                    |         |<-Tvbp->|                   |        |   
- *                    |                                      |<-Tvfp->|   
- *                    |<----------------------Tvt-------------------->|    
+ *                                       |<-------Tva------->|
+ *                                       |___________________|                     ______
+ * Display Enable   _____________________|                   |_____________________|
+ *                                       |                   |
+ * Vertical Pulse   __           ________|___________________|________          __________
+ *                    |_________|        |                   |        |________|
+ *                    |<- Tvp ->|        |                   |        |
+ *                    |         |<-Tvbp->|                   |        |
+ *                    |                                      |<-Tvfp->|
+ *                    |<----------------------Tvt-------------------->|
  *
- * Tva  - Active Display Time   = 480 lines   
- * Tvp  - Vertical Pulse        = 2 lines   
- * Tvfp - Vertical Front Porch  = 10 lines   
- * Tvbp - Vertical Backporch    = 33 lines   
- * Tvt  - Total Horizontal Time = 525 lines @ 31.776us/line = 16.682ms or 60Hz   
+ * Tva  - Active Display Time   = 480 lines
+ * Tvp  - Vertical Pulse        = 2 lines
+ * Tvfp - Vertical Front Porch  = 10 lines
+ * Tvbp - Vertical Backporch    = 33 lines
+ * Tvt  - Total Horizontal Time = 525 lines @ 31.776us/line = 16.682ms or 60Hz
  *
- * Correlation between vertical timing parameters and SED registers   
+ * Correlation between vertical timing parameters and SED registers
  *#define SED_VER_PULSE_WIDTH_LCD 0x01 // VRTC/FPFRAME Pulse Width Register    = Tvp - 1
- *#define SED_VER_PULSE_START_LCD 0x09 // VRTC/FPFRAME Start Position Register = Tvfp - 1            
+ *#define SED_VER_PULSE_START_LCD 0x09 // VRTC/FPFRAME Start Position Register = Tvfp - 1
  *#define SED_VER_NONDISP_LCD   0x2c // Vertical Non-Display Period Register = (Tvp + Tvfp + Tvbp) - 1
  */
 extern long SED_VER_PULSE_WIDTH_LCD;
diff --git a/c/src/lib/libbsp/arm/csb337/console/uarts.c b/c/src/lib/libbsp/arm/csb337/console/uarts.c
index c5e8288379..7b9ab8002c 100644
--- a/c/src/lib/libbsp/arm/csb337/console/uarts.c
+++ b/c/src/lib/libbsp/arm/csb337/console/uarts.c
@@ -1,11 +1,11 @@
 /*
  *  Console driver for for KIT637_V6 (CSB637)
  *
- *  This driver uses the shared console driver in 
+ *  This driver uses the shared console driver in
  *  ...../libbsp/shared/console.c
  *
  *  Copyright (c) 2003 by Cogent Computer Systems
- *  Written by Jay Monkman <jtm@lopingdog.com> 
+ *  Written by Jay Monkman <jtm@lopingdog.com>
  *
  * Modified by Fernando Nicodemos <fgnicodemos@terra.com.br>
  * from NCB - Sistemas Embarcados Ltda. (Brazil)
@@ -14,7 +14,7 @@
  *  found in the file LICENSE in this distribution or at
  *  http://www.rtems.com/license/LICENSE.
  *
- *  Modified and FrameBuffer Console Device Support added by 
+ *  Modified and FrameBuffer Console Device Support added by
  *  Joel Sherrill, 2009.
  *
  *  $Id$
@@ -46,35 +46,35 @@ extern console_fns dbgu_fns;
   extern console_fns umoncons_fns;
   #define UMON_CONS_DEV 1
 #else
-  #define UMON_CONS_DEV 0 
+  #define UMON_CONS_DEV 0
 #endif
 
 #if ENABLE_USART0 || ENABLE_USART1 || ENABLE_USART2 || ENABLE_USART3
   extern console_fns usart_polling_fns;
 #endif
 
-#if ENABLE_USART0 
+#if ENABLE_USART0
   #define USART0_DEV 1
 #else
-  #define USART0_DEV 0 
+  #define USART0_DEV 0
 #endif
 
-#if ENABLE_USART1 
+#if ENABLE_USART1
   #define USART1_DEV 1
 #else
-  #define USART1_DEV 0 
+  #define USART1_DEV 0
 #endif
 
 #if ENABLE_USART2
   #define USART2_DEV 1
 #else
-  #define USART2_DEV 0 
+  #define USART2_DEV 0
 #endif
 
 #if ENABLE_USART3
   #define USART3_DEV 1
 #else
-  #define USART3_DEV 0 
+  #define USART3_DEV 0
 #endif
 
 #define NUM_DEVS \
@@ -85,7 +85,7 @@ extern console_fns dbgu_fns;
 unsigned long Console_Port_Count = NUM_DEVS;
 console_data  Console_Port_Data[NUM_DEVS];
 
-/* 
+/*
  * There's one item in array for each UART.
  *
  * Some of these fields are marked "NOT USED". They are not used
diff --git a/c/src/lib/libbsp/arm/csb337/include/bsp.h b/c/src/lib/libbsp/arm/csb337/include/bsp.h
index 1e5a8cc88f..72e2883a10 100644
--- a/c/src/lib/libbsp/arm/csb337/include/bsp.h
+++ b/c/src/lib/libbsp/arm/csb337/include/bsp.h
@@ -38,7 +38,7 @@ console_tbl *BSP_get_uart_from_minor(int minor);
 static inline int32_t BSP_get_baud(void) {return 38400;}
 
 #define ST_PIMR_PIV	33	/* 33 ticks of the 32.768Khz clock ~= 1msec */
-  
+
 /*
  * Network driver configuration
  */
diff --git a/c/src/lib/libbsp/arm/csb337/network/network.c b/c/src/lib/libbsp/arm/csb337/network/network.c
index 5960476241..34f8a7b5bc 100644
--- a/c/src/lib/libbsp/arm/csb337/network/network.c
+++ b/c/src/lib/libbsp/arm/csb337/network/network.c
@@ -523,8 +523,8 @@ void  at91rm9200_emac_init_hw(at91rm9200_emac_softc_t *sc)
 	#if defined(PHY_DBG)
           printk("10MBIT, ");
         #endif
-      }                
-                        
+      }
+
       if (emac_link_status & (PHY_STAT_100BASE_X_FDX | PHY_STAT_10BASE_FDX)) {
         EMAC_REG(EMAC_CFG) |= EMAC_CFG_FD;
 	#if defined(PHY_DBG)
@@ -535,7 +535,7 @@ void  at91rm9200_emac_init_hw(at91rm9200_emac_softc_t *sc)
 	#if defined(PHY_DBG)
           printk("Half Duplex.\n");
         #endif
-      }                
+      }
 
       /* Set PHY LED modes.  Traffic Meter Mode for ACTLED
        * Set Bit 6 - Traffic Mode on
diff --git a/c/src/lib/libbsp/arm/csb337/start/start.S b/c/src/lib/libbsp/arm/csb337/start/start.S
index f44fd22466..f3b2131a02 100644
--- a/c/src/lib/libbsp/arm/csb337/start/start.S
+++ b/c/src/lib/libbsp/arm/csb337/start/start.S
@@ -2,7 +2,7 @@
  * Cogent CSB337 startup code
  *
  * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com>
- *      
+ *
  *  The license and distribution terms for this file may be
  *  found in the file LICENSE in this distribution or at
  *
@@ -28,25 +28,25 @@
 .text
 .globl  _start
 _start:
-        /* 
+        /*
          * Since I don't plan to return to the bootloader,
          * I don't have to save the registers.
          *
-         * I'll just set the CPSR for SVC mode, interrupts 
+         * I'll just set the CPSR for SVC mode, interrupts
          * off, and ARM instructions.
          */
         mov     r0, #(PSR_MODE_SVC | PSR_I | PSR_F)
         msr     cpsr, r0
-        
+
         /* zero the bss */
         ldr     r1, =_bss_end_
         ldr     r0, =_bss_start_
 
-_bss_init:        
+_bss_init:
         mov     r2, #0
         cmp     r0, r1
         strlot  r2, [r0], #4
-        blo     _bss_init        /* loop while r0 < r1 */ 
+        blo     _bss_init        /* loop while r0 < r1 */
 
 
         /* --- Initialize stack pointer registers */
@@ -70,26 +70,26 @@ _bss_init:
         ldr     r1, =_abt_stack_size
         ldr     sp, =_abt_stack
         add     sp, sp, r1
-        
+
         /* Set up the SVC stack pointer last and stay in SVC mode */
         mov     r0, #(PSR_MODE_SVC | PSR_I | PSR_F)     /* No interrupts */
         msr     cpsr, r0
         ldr     r1, =_svc_stack_size
         ldr     sp, =_svc_stack
         add     sp, sp, r1
-        sub     sp, sp, #0x64   
+        sub     sp, sp, #0x64
 
-        /* 
+        /*
          * Initialize the MMU. After we return, the MMU is enabled,
          * and memory may be remapped. I hope we don't remap this
          * memory away.
          */
         ldr     r0, =mem_map
-        bl      mmu_init               
+        bl      mmu_init
 
-        /* 
+        /*
          * Initialize the exception vectors. This includes the
-         * exceptions vectors (0x00000000-0x0000001c), and the 
+         * exceptions vectors (0x00000000-0x0000001c), and the
          * pointers to the exception handlers (0x00000020-0x0000003c).
          */
         mov     r0, #0
@@ -103,7 +103,7 @@ _bss_init:
         mov     r0, #0
         bl      boot_card
 
-        /* 
+        /*
          * Theoretically, we could return to what started us up,
          * but we'd have to have saved the registers and stacks.
          * Instead, we'll just reset.
@@ -113,13 +113,13 @@ _bss_init:
         /* We shouldn't get here. If we do, hang */
 _hang:  b       _hang
 
-        
-/* 
+
+/*
  * This is the exception vector table and the pointers to
  * the functions that handle the exceptions. It's a total
  * of 16 words (64 bytes)
  */
-vector_block:   
+vector_block:
         ldr     pc, Reset_Handler
         ldr     pc, Undefined_Handler
         ldr     pc, SWI_Handler
@@ -131,7 +131,7 @@ vector_block:
 
 Reset_Handler:          b       bsp_reset
 Undefined_Handler:      b       Undefined_Handler
-SWI_Handler:            b       SWI_Handler 
+SWI_Handler:            b       SWI_Handler
 Prefetch_Handler:       b       Prefetch_Handler
 Abort_Handler:          b       Abort_Handler
                         nop
diff --git a/c/src/lib/libbsp/arm/csb337/startup/bspreset.c b/c/src/lib/libbsp/arm/csb337/startup/bspreset.c
index 8a47d077db..3b0bbb6ea5 100644
--- a/c/src/lib/libbsp/arm/csb337/startup/bspreset.c
+++ b/c/src/lib/libbsp/arm/csb337/startup/bspreset.c
@@ -3,7 +3,7 @@
  *
  * Copyright (c) 2004 by Cogent Computer Systems
  * Written by Jay Monkman <jtm@lopingdog.com>
- *	
+ *
  *  The license and distribution terms for this file may be
  *  found in the file LICENSE in this distribution or at
  *  http://www.rtems.com/license/LICENSE.
diff --git a/c/src/lib/libbsp/arm/csb337/startup/bspstart.c b/c/src/lib/libbsp/arm/csb337/startup/bspstart.c
index 9ffe729611..7566e32e85 100644
--- a/c/src/lib/libbsp/arm/csb337/startup/bspstart.c
+++ b/c/src/lib/libbsp/arm/csb337/startup/bspstart.c
@@ -3,7 +3,7 @@
  *
  * Copyright (c) 2004 by Cogent Computer Systems
  * Written by Jay Monkman <jtm@lopingdog.com>
- *	
+ *
  *  The license and distribution terms for this file may be
  *  found in the file LICENSE in this distribution or at
  *
@@ -38,7 +38,7 @@ void bsp_start_default( void )
   /* disable interrupts */
   AIC_CTL_REG(AIC_IDCR) = 0xffffffff;
 
-  /* 
+  /*
    * Some versions of the bootloader have the MAC address
    * reversed. This fixes it, if necessary.
    */
@@ -48,15 +48,15 @@ void bsp_start_default( void )
    * Init rtems exceptions management
    */
   rtems_exception_init_mngt();
-  
+
   /*
    * Init rtems interrupt management
    */
   rtems_irq_mngt_init();
-    
+
 } /* bsp_start */
 
-/* 
+/*
  * Some versions of the bootloader shipped with the CSB337
  * reverse the MAC address. This function tests for that,
  * and fixes the MAC address.