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authorChristian Mauderer <Christian.Mauderer@embedded-brains.de>2017-07-28 11:11:54 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2017-11-17 14:14:18 +0100
commit2e2a41ecd99d17b379b2874cbd45d32b9430791e (patch)
treef2cb3b61174f9dfad62c85c05689b8db204fe8d6 /c/src/lib/libbsp/arm/atsam/configure.ac
parentbsp/atsam: Improve SDRAM initialization. (diff)
downloadrtems-2e2a41ecd99d17b379b2874cbd45d32b9430791e.tar.bz2
bsp/atsam: Add timing for RAM mt48lc16m16a2p-6a.
Diffstat (limited to '')
-rw-r--r--c/src/lib/libbsp/arm/atsam/configure.ac1
1 files changed, 1 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/arm/atsam/configure.ac b/c/src/lib/libbsp/arm/atsam/configure.ac
index 8a4a2f2a7f..06a0b3a5e6 100644
--- a/c/src/lib/libbsp/arm/atsam/configure.ac
+++ b/c/src/lib/libbsp/arm/atsam/configure.ac
@@ -56,6 +56,7 @@ AC_ARG_ENABLE(
[case "${enableval}" in
is42s16100e-7bli) AC_DEFINE([ATSAM_SDRAM_IS42S16100E_7BLI],[1],[SDRAM variant]) EXTSDRAM=0x00200000 ;;
is42s16320f-7bl) AC_DEFINE([ATSAM_SDRAM_IS42S16320F_7BL],[1],[SDRAM variant]) EXTSDRAM=0x04000000 ;;
+ mt48lc16m16a2p-6a) AC_DEFINE([ATSAM_SDRAM_MT48LC16M16A2P_6A],[1],[SDRAM variant]) EXTSDRAM=0x02000000 ;;
*) AC_MSG_ERROR([bad value ${enableval} for SDRAM variant]) ;;
esac],
[AC_DEFINE([ATSAM_SDRAM_IS42S16100E_7BLI],[1],[SDRAM variant]) EXTSDRAM=0x00200000])