Patch from Eric Valette <valette@crf.canon.fr> which brings the i386ex BSP

inline with the new IRQ structure.

2 files changed, 0 insertions, 499 deletions

diff --git a/c/src/exec/score/cpu/i386/cpu_asm.s b/c/src/exec/score/cpu/i386/cpu_asm.s
index b84d41afc2..a0bd6ece2c 100644
--- a/c/src/exec/score/cpu/i386/cpu_asm.s
+++ b/c/src/exec/score/cpu/i386/cpu_asm.s
@@ -109,444 +109,6 @@ SYM (_CPU_Context_restore_fp):
         frstor    (eax)                    # restore FP context
         ret
 
-/*PAGE
- *  void _ISR_Handler()
- *
- *  This routine provides the RTEMS interrupt management.
- *
- *  NOTE:
- *    Upon entry, the stack will contain a stack frame back to the
- *    interrupted task.  If dispatching is enabled, this is the
- *    outer most interrupt, and (a context switch is necessary or
- *    the current task has signals), then set up the stack to
- *    transfer control to the interrupt dispatcher.
- */
-
-.set SET_SEGMENT_REGISTERS_IN_INTERRUPT, 0
-
-.set SAVED_REGS     , 32                   # space consumed by saved regs
-.set EIP_OFFSET     , SAVED_REGS           # offset of tasks eip
-.set CS_OFFSET      , EIP_OFFSET+4         # offset of tasks code segment
-.set EFLAGS_OFFSET  , CS_OFFSET+4          # offset of tasks eflags
-
-        .p2align  1
-        PUBLIC (_ISR_Handler)
-
-SYM (_ISR_Handler):
-       /*
-        *  Before this was point is reached the vectors unique
-        *  entry point did the following:
-        *
-        *     1. saved all registers with a "pusha"
-        *     2. put the vector number in eax.
-        *
-        * BEGINNING OF ESTABLISH SEGMENTS
-        *
-        *  WARNING: If an interrupt can occur when the segments are
-        *           not correct, then this is where we should establish
-        *           the segments.  In addition to establishing the
-        *           segments, it may be necessary to establish a stack
-        *           in the current data area on the outermost interrupt.
-        *
-        *  NOTE:  If the previous values of the segment registers are
-        *         pushed, do not forget to adjust SAVED_REGS.
-        *
-        *  NOTE:  Make sure the exit code which restores these
-        *         when this type of code is needed.
-        */
-
-       /***** ESTABLISH SEGMENTS CODE GOES HERE  ******/
-
-       /*
-        * END OF ESTABLISH SEGMENTS
-        */
-
-        /*
-         *  Now switch stacks if necessary
-         */
-
-        movl      esp, edx                  # edx = previous stack pointer
-        cmpl      $0, SYM (_ISR_Nest_level) # is this the outermost interrupt?
-        jne       nested                    # No, then continue
-        movl      SYM (_CPU_Interrupt_stack_high), esp
-
-        /*
-         *  We want to insure that the old stack pointer is on the
-         *  stack we will be on at the end of the ISR when we restore it.
-         *  By saving it on every interrupt, all we have to do is pop it
-         *  near the end of every interrupt.
-         */
-
-nested:
-        pushl     edx                       # save the previous stack pointer
-        incl      SYM (_ISR_Nest_level)     # one nest level deeper
-        incl      SYM (_Thread_Dispatch_disable_level) # disable multitasking
-
-        # EAX is preloaded with the vector number.
-        push      eax                       # push vector number
-        mov       SYM (_ISR_Vector_table) (,eax,4),eax
-                                            # eax = Users handler
-        call      eax                       # invoke user ISR
-        pop       eax                       # eax = vector number
-
-        decl      SYM (_ISR_Nest_level)     # one less ISR nest level
-                                            # If interrupts are nested,
-                                            #   then dispatching is disabled
-
-        decl      SYM (_Thread_Dispatch_disable_level)
-                                            # unnest multitasking
-                                            # Is dispatch disabled
-        jne       exit                      # Yes, then exit
-
-        cmpl      $0, SYM (_Context_Switch_necessary)
-                                            # Is task switch necessary?
-        jne       bframe                    # Yes, then build stack
-
-        cmpl      $0, SYM (_ISR_Signals_to_thread_executing)
-                                            # signals sent to Run_thread
-                                            #   while in interrupt handler?
-        je        exit                      # No, exit
-
-bframe:
-        cli                                 # DISABLE INTERRUPTS!!
-        popl      esp                       # restore the stack pointer
-        movl      $0, SYM (_ISR_Signals_to_thread_executing)
-                                            # push the isf for Isr_dispatch
-        push      EFLAGS_OFFSET(esp)        # push tasks eflags
-        push      cs                        # cs of Isr_dispatch
-        push      $ SYM (_ISR_Dispatch)     # entry point
-        iret
-
-exit:
-        cli                                 # DISABLE INTERRUPTS!!
-        popl      esp                       # restore the stack pointer
-
-       /*
-        * BEGINNING OF DE-ESTABLISH SEGMENTS
-        *
-        *  NOTE:  Make sure there is code here if code is added to
-        *         load the segment registers.
-        *
-        */
-
-       /******* DE-ESTABLISH SEGMENTS CODE GOES HERE ********/
-
-       /*
-        * END OF DE-ESTABLISH SEGMENTS
-        */
-
-        popa                                # restore general registers
-        iret
-
-/*PAGE
- *  Distinct Interrupt Entry Points
- *
- *  The following macro and the 256 instantiations of the macro
- *  are necessary to determine which interrupt vector occurred.
- *  The following macro allows a unique entry point to be defined
- *  for each vector.
- *
- *  NOTE: There are not spaces around the vector number argument
- *        to the DISTINCT_INTERRUPT_ENTRY macro because m4 will
- *        undesirably generate the symbol "_Isr_handler_ N"
- *        instead of "_Isr_handler_N" like we want.
- */
-
-#define DISTINCT_INTERRUPT_ENTRY(_vector) \
-        .p2align 4                         ; \
-        PUBLIC (_ISR_Handler_ ## _vector ) ; \
-SYM (_ISR_Handler_ ## _vector ):             \
-        pusha                              ; \
-        xor   eax, eax                     ; \
-        movb  $ ## _vector, al             ; \
-        jmp   SYM (_ISR_Handler) ;
-
-DISTINCT_INTERRUPT_ENTRY(0)
-DISTINCT_INTERRUPT_ENTRY(1)
-DISTINCT_INTERRUPT_ENTRY(2)
-DISTINCT_INTERRUPT_ENTRY(3)
-DISTINCT_INTERRUPT_ENTRY(4)
-DISTINCT_INTERRUPT_ENTRY(5)
-DISTINCT_INTERRUPT_ENTRY(6)
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-DISTINCT_INTERRUPT_ENTRY(8)
-DISTINCT_INTERRUPT_ENTRY(9)
-DISTINCT_INTERRUPT_ENTRY(10)
-DISTINCT_INTERRUPT_ENTRY(11)
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-DISTINCT_INTERRUPT_ENTRY(14)
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-
-/*PAGE
- *  void _ISR_Dispatch()
- *
- *  Entry point from the outermost interrupt service routine exit.
- *  The current stack is the supervisor mode stack.
- */
-
-        PUBLIC (_ISR_Dispatch)
-SYM (_ISR_Dispatch):
-
-        call      SYM (_Thread_Dispatch)   # invoke Dispatcher
-
-       /*
-        * BEGINNING OF DE-ESTABLISH SEGMENTS
-        *
-        *  NOTE:  Make sure there is code here if code is added to
-        *         load the segment registers.
-        *
-        */
-
-       /***** DE-ESTABLISH SEGMENTS CODE GOES HERE ****/
-
-       /*
-        * END OF DE-ESTABLISH SEGMENTS
-        */
-
-        popa                                # restore general registers
-        iret                                # return to interrupted thread
-
 /*
  *  GO32 does not require these segment related routines.
  */
diff --git a/c/src/exec/score/cpu/i386/i386.h b/c/src/exec/score/cpu/i386/i386.h
index 9e49b5ab84..0eb936a6f7 100644
--- a/c/src/exec/score/cpu/i386/i386.h
+++ b/c/src/exec/score/cpu/i386/i386.h
@@ -129,67 +129,6 @@ static inline unsigned int i386_swap_U16(
     return (sout);
 }
 
-/*
- *  IO Port Access Routines
- */
-
-#define i386_outport_byte( _port, _value ) \
-   { register unsigned short __port  = _port; \
-     register unsigned char  __value = _value; \
-     \
-     asm volatile ( "outb %0,%1" : "=a" (__value), "=d" (__port) \
-                                 : "0"   (__value), "1"  (__port) \
-                  ); \
-   }
-
-#define i386_outport_word( _port, _value ) \
-   { register unsigned short __port  = _port; \
-     register unsigned short __value = _value; \
-     \
-     asm volatile ( "outw %0,%1" : "=a" (__value), "=d" (__port) \
-                                 : "0"   (__value), "1"  (__port) \
-                  ); \
-   }
-
-#define i386_outport_long( _port, _value ) \
-   { register unsigned short __port  = _port; \
-     register unsigned int  __value = _value; \
-     \
-     asm volatile ( "outl %0,%1" : "=a" (__value), "=d" (__port) \
-                                 : "0"   (__value), "1"  (__port) \
-                  ); \
-   }
-
-#define i386_inport_byte( _port, _value ) \
-   { register unsigned short __port  = _port; \
-     register unsigned char  __value = 0; \
-     \
-     asm volatile ( "inb %1,%0" : "=a" (__value), "=d" (__port) \
-                                : "0"   (__value), "1"  (__port) \
-                  ); \
-     _value = __value; \
-   }
-
-#define i386_inport_word( _port, _value ) \
-   { register unsigned short __port  = _port; \
-     register unsigned short __value = 0; \
-     \
-     asm volatile ( "inw %1,%0" : "=a" (__value), "=d" (__port) \
-                                : "0"   (__value), "1"  (__port) \
-                  ); \
-     _value = __value; \
-   }
-
-#define i386_inport_long( _port, _value ) \
-   { register unsigned short __port  = _port; \
-     register unsigned int  __value = 0; \
-     \
-     asm volatile ( "inl %1,%0" : "=a" (__value), "=d" (__port) \
-                                : "0"   (__value), "1"  (__port) \
-                  ); \
-     _value = __value; \
-   }
-
 
 /* routines */