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authorJoel Sherrill <joel.sherrill@OARcorp.com>2000-09-22 20:34:15 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2000-09-22 20:34:15 +0000
commitbbfdedd86d08b52c19d8b0fbae8c0ba8a013ea34 (patch)
tree709bcc3d7b76a929c8b5aae766fe76e676919237 /c/src/exec/score
parent2000-09-22 Joel Sherrill <joel@OARcorp.com> (diff)
downloadrtems-bbfdedd86d08b52c19d8b0fbae8c0ba8a013ea34.tar.bz2
2000-09-22 Joel Sherrill <joel@OARcorp.com>
* amd.ah, cpu.c, cpu_asm.S, register.ah, sig.S, rtems/score/cpu.h: Updated and fixed minor things. Commented out offensive assembly and made applications link.
Diffstat (limited to 'c/src/exec/score')
-rw-r--r--c/src/exec/score/cpu/a29k/ChangeLog6
-rw-r--r--c/src/exec/score/cpu/a29k/amd.ah3
-rw-r--r--c/src/exec/score/cpu/a29k/cpu.c19
-rw-r--r--c/src/exec/score/cpu/a29k/cpu_asm.S32
-rw-r--r--c/src/exec/score/cpu/a29k/register.ah3
-rw-r--r--c/src/exec/score/cpu/a29k/rtems/score/cpu.h12
-rw-r--r--c/src/exec/score/cpu/a29k/sig.S20
7 files changed, 87 insertions, 8 deletions
diff --git a/c/src/exec/score/cpu/a29k/ChangeLog b/c/src/exec/score/cpu/a29k/ChangeLog
index c9d40c1324..65cef217bd 100644
--- a/c/src/exec/score/cpu/a29k/ChangeLog
+++ b/c/src/exec/score/cpu/a29k/ChangeLog
@@ -1,5 +1,11 @@
2000-09-22 Joel Sherrill <joel@OARcorp.com>
+ * amd.ah, cpu.c, cpu_asm.S, register.ah, sig.S, rtems/score/cpu.h:
+ Updated and fixed minor things. Commented out offensive assembly
+ and made applications link.
+
+2000-09-22 Joel Sherrill <joel@OARcorp.com>
+
* Makefile.am, cpu_asm.S, psmacro.ah, rtems/score/cpu.h:
First attempt to compile with GNU tools. Minor modifications
to compile enough to get to assembler errors.
diff --git a/c/src/exec/score/cpu/a29k/amd.ah b/c/src/exec/score/cpu/a29k/amd.ah
index 006e7e15e7..84a749edea 100644
--- a/c/src/exec/score/cpu/a29k/amd.ah
+++ b/c/src/exec/score/cpu/a29k/amd.ah
@@ -1,3 +1,5 @@
+#if 0
+
; /* @(#)amd.ah 1.1 96/05/23 08:56:58, TEI */
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Initialization values for registers after RESET
@@ -6,6 +8,7 @@
: /* $Id$ */
;* File information and includes.
+#endif
.file "amd.ah"
.ident "@(#)amd.ah 1.1 96/05/23 08:56:58, TEI"
diff --git a/c/src/exec/score/cpu/a29k/cpu.c b/c/src/exec/score/cpu/a29k/cpu.c
index 0485714062..158f680d4e 100644
--- a/c/src/exec/score/cpu/a29k/cpu.c
+++ b/c/src/exec/score/cpu/a29k/cpu.c
@@ -114,6 +114,18 @@ extern void intr14( void );
extern void intr18( void );
extern void intr19( void );
+/* just to link with GNU tools JRS 09/22/2000 */
+asm (".global V_SPILL, V_FILL" );
+asm (".global V_EPI_OS, V_BSD_OS" );
+
+asm (".equ V_SPILL, 64" );
+asm (".equ V_FILL, 65" );
+
+asm (".equ V_BSD_OS, 66" );
+asm (".equ V_EPI_OS, 69" );
+
+/* end of just to link with GNU tools */
+
void _CPU_ISR_install_raw_handler(
unsigned32 vector,
proc_ptr new_handler,
@@ -126,6 +138,8 @@ void _CPU_ISR_install_raw_handler(
*/
switch( vector )
{
+/* where is this code? JRS */
+#if 0
case 14:
_settrap( vector, intr14 );
break;
@@ -135,6 +149,7 @@ void _CPU_ISR_install_raw_handler(
case 19:
_settrap( vector, intr19 );
break;
+#endif
default:
break;
@@ -193,7 +208,7 @@ void _CPU_Install_interrupt_stack( void )
/*PAGE
*
- * _CPU_Internal_threads_Idle_thread_body
+ * _CPU_Thread_Idle_body
*
* NOTES:
*
@@ -208,7 +223,7 @@ void _CPU_Install_interrupt_stack( void )
* hook with caution.
*/
-void _CPU_Internal_threads_Idle_thread_body( void )
+void _CPU_Thread_Idle_body( void )
{
for( ; ; )
diff --git a/c/src/exec/score/cpu/a29k/cpu_asm.S b/c/src/exec/score/cpu/a29k/cpu_asm.S
index 87da542227..cc35e79ee3 100644
--- a/c/src/exec/score/cpu/a29k/cpu_asm.S
+++ b/c/src/exec/score/cpu/a29k/cpu_asm.S
@@ -139,6 +139,7 @@ __CPU_Context_switch:
.global _a29k_context_switch_sup
_a29k_context_switch_sup:
+#if 0
add pcb,lr2,0
add kt1,lr3,0 ;move heir pointer to safe location
constn it0,SIG_SYNC
@@ -222,6 +223,7 @@ context_restore:
spopsr ops,it1,pcb
nop
iret
+#endif
;/*
@@ -242,6 +244,7 @@ context_restore:
.global __CPU_Context_restore
__CPU_Context_restore:
+#if 0
asneq 107, gr1, gr1 ; syscall
jmpi lr0 ;
nop ;
@@ -306,12 +309,15 @@ RestoreFZState it1,it2
;
iret
;
+#endif
.global __CPU_Context_save
__CPU_Context_save:
+#if 0
asneq 108, gr1, gr1 ; syscall
jmpi lr0 ;
nop ;
+#endif
;/* void __ISR_Handler()
@@ -392,24 +398,31 @@ __CPU_Context_save:
.global _a29k_getops
_a29k_getops:
+#if 0
asneq 113, gr96, gr96
jmpi lr0
nop
+#endif
.global _a29k_getops_sup
_a29k_getops_sup:
+#if 0
mfsr gr96, ops ; caller wants ops
iret
nop
+#endif
.global _a29k_disable
_a29k_disable:
+#if 0
asneq 110, gr96, gr96
jmpi lr0
nop
+#endif
.global _a29k_disable_sup
_a29k_disable_sup:
+#if 0
mfsr kt0, ops
add gr96, kt0, 0 ; return ops to caller
const kt1, (DI | TD)
@@ -418,15 +431,19 @@ _a29k_disable_sup:
mtsr ops, kt1
iret
nop
+#endif
.global _a29k_disable_all
_a29k_disable_all:
+#if 0
asneq 112, gr96, gr96
jmpi lr0
nop
+#endif
.global _a29k_disable_all_sup
_a29k_disable_all_sup:
+#if 0
mfsr kt0, ops
const kt1, (DI | TD)
consth kt1, (DI | TD)
@@ -434,15 +451,19 @@ _a29k_disable_all_sup:
mtsr ops, kt1
iret
nop
+#endif
.global _a29k_enable_all
_a29k_enable_all:
+#if 0
asneq 111, gr96, gr96
jmpi lr0
nop
+#endif
.global _a29k_enable_all_sup
_a29k_enable_all_sup:
+#if 0
mfsr kt0, ops
const kt1, (DI | TD)
consth kt1, (DI | TD)
@@ -450,15 +471,19 @@ _a29k_enable_all_sup:
mtsr ops, kt1
iret
nop
+#endif
.global _a29k_enable
_a29k_enable:
+#if 0
asneq 109, gr96, gr96
jmpi lr0
nop
+#endif
.global _a29k_enable_sup
_a29k_enable_sup:
+#if 0
mfsr kt0, ops
const kt1, (DI | TD)
consth kt1, (DI | TD)
@@ -468,23 +493,30 @@ _a29k_enable_sup:
mtsr ops, kt1
iret
nop
+#endif
.global _a29k_halt
_a29k_halt:
+#if 0
halt
jmp _a29k_halt
nop
+#endif
.global _a29k_super_mode
_a29k_super_mode:
+#if 0
mfsr gr96, ops
or gr96, gr96, 0x10
mtsr ops, gr96
iret
nop
+#endif
.global _a29k_as70
_a29k_as70:
+#if 0
asneq 70,gr96,gr96
jmpi lr0
nop
+#endif
diff --git a/c/src/exec/score/cpu/a29k/register.ah b/c/src/exec/score/cpu/a29k/register.ah
index 35142b508f..853e6ef049 100644
--- a/c/src/exec/score/cpu/a29k/register.ah
+++ b/c/src/exec/score/cpu/a29k/register.ah
@@ -11,6 +11,8 @@
;* Register Stack pointer and frame pointer registers.
+/* The assembly language is supposed to be Sierra High-C */
+#if 0
.extern Rrsp, Rfp
.reg regsp, %%Rrsp
@@ -212,3 +214,4 @@
; .reg LTemp1, OStmp8 ; local temp 1
; ****************************************************************************
+#endif
diff --git a/c/src/exec/score/cpu/a29k/rtems/score/cpu.h b/c/src/exec/score/cpu/a29k/rtems/score/cpu.h
index 34370808d1..2f0290c46e 100644
--- a/c/src/exec/score/cpu/a29k/rtems/score/cpu.h
+++ b/c/src/exec/score/cpu/a29k/rtems/score/cpu.h
@@ -310,7 +310,7 @@ extern void a29k_sigdfl_sup(void);
*
*/
-#warning "Check these definitions!!!"
+/* #warning "Check these definitions!!!" */
#define CPU_HAS_OWN_HOST_TO_NETWORK_ROUTINES FALSE
#define CPU_BIG_ENDIAN TRUE
@@ -458,7 +458,11 @@ typedef struct {
boolean do_zero_of_workspace;
unsigned32 idle_task_stack_size;
unsigned32 interrupt_stack_size;
- unsigned32 extra_system_initialization_stack;
+ unsigned32 extra_mpci_receive_server_stack;
+ void * (*stack_allocate_hook)( unsigned32 );
+ void (*stack_free_hook)( void* );
+ /* end of fields required on all CPUs */
+
} rtems_cpu_table;
/*
@@ -905,7 +909,7 @@ void _CPU_ISR_install_vector(
void _CPU_Install_interrupt_stack( void );
/*
- * _CPU_Internal_threads_Idle_thread_body
+ * _CPU_Thread_Idle_body
*
* This routine is the CPU dependent IDLE thread body.
*
@@ -913,7 +917,7 @@ void _CPU_Install_interrupt_stack( void );
* is TRUE.
*/
-void _CPU_Internal_threads_Idle_thread_body( void );
+void _CPU_Thread_Idle_body( void );
/*
* _CPU_Context_switch
diff --git a/c/src/exec/score/cpu/a29k/sig.S b/c/src/exec/score/cpu/a29k/sig.S
index 245570ffcb..9caddf1382 100644
--- a/c/src/exec/score/cpu/a29k/sig.S
+++ b/c/src/exec/score/cpu/a29k/sig.S
@@ -3,8 +3,8 @@
; */
; .include "register.ah"
- .include "amd.ah"
- .include "pswmacro.ah"
+#include <amd.ah>
+#include <pswmacro.ah>
.comm WindowSize,4
.text
.reg it0,gr64
@@ -23,26 +23,33 @@
.global _intr14
_intr14:
+#if 0
const it3,14
sup_sv
jmp interrupt
nop
+#endif
.global _intr18
_intr18:
+#if 0
const it3,18
sup_sv
jmp interrupt
nop
+#endif
.global _intr19
_intr19:
+#if 0
const it3,19
sup_sv
jmp interrupt
nop
+#endif
interrupt:
+#if 0
push msp,it3
push msp,gr1
push msp,rab
@@ -72,10 +79,12 @@ interrupt:
or it0,it1,it0
mtsr cps, it0
; fall through to _sigcode
+#endif
.extern _a29k_ISR_Handler
.global _sigcode
_sigcode:
+#if 0
push msp, lr1 ; R stack support
push msp, rfb ; support
@@ -156,18 +165,22 @@ lower:
raise:
jmp sendsig ;
add gr1, rab, 0 ;
+#endif
.global _a29k_sigdfl_sup
_a29k_sigdfl_sup:
+#if 0
repair_R_stack ;
repair_regs ;
sig_return ; return
halt ; never executes
+#endif
.global _sigret
_sigret:
+#if 0
;assume msp points to tav
mfsr it0,cps
const it1,FZ
@@ -190,8 +203,11 @@ _sigret1:
add gr1,it0,0
add msp,msp,4 ;discount signal
iret
+#endif
_a29k_sigdfl:
+#if 0
asneq SIGDFL,gr1,gr1
jmpi lr0
nop
+#endif