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authorJoel Sherrill <joel.sherrill@OARcorp.com>2002-05-14 16:53:01 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2002-05-14 16:53:01 +0000
commit78f8c9174757f9da51b0b78bce1ff0b5378cfe07 (patch)
tree895e59fd140a047c73ffd3a820414cb42be74bbb /c/src/exec/score
parent2002-05-14 Ralf Corsepius <corsepiu@faw.uni-ulm.de> (diff)
downloadrtems-78f8c9174757f9da51b0b78bce1ff0b5378cfe07.tar.bz2
2001-05-14 Till Straumann <strauman@slac.stanford.edu>
* rtems/powerpc/registers.h, rtems/score/ppc.h: Per PR213, add support for the MPC74000 (AKA G4); there is no AltiVec support yet, however.
Diffstat (limited to 'c/src/exec/score')
-rw-r--r--c/src/exec/score/cpu/powerpc/ChangeLog5
-rw-r--r--c/src/exec/score/cpu/powerpc/rtems/powerpc/registers.h1
-rw-r--r--c/src/exec/score/cpu/powerpc/rtems/score/ppc.h8
3 files changed, 14 insertions, 0 deletions
diff --git a/c/src/exec/score/cpu/powerpc/ChangeLog b/c/src/exec/score/cpu/powerpc/ChangeLog
index 6221f849d0..997d9d26aa 100644
--- a/c/src/exec/score/cpu/powerpc/ChangeLog
+++ b/c/src/exec/score/cpu/powerpc/ChangeLog
@@ -1,3 +1,8 @@
+2001-05-14 Till Straumann <strauman@slac.stanford.edu>
+
+ * rtems/powerpc/registers.h, rtems/score/ppc.h: Per PR213, add
+ support for the MPC74000 (AKA G4); there is no AltiVec support yet,
+ however.
2002-04-30 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* rtems/score/ppc.h: Remove rtems_multilib.
diff --git a/c/src/exec/score/cpu/powerpc/rtems/powerpc/registers.h b/c/src/exec/score/cpu/powerpc/rtems/powerpc/registers.h
index f57faedab4..cfc6362a21 100644
--- a/c/src/exec/score/cpu/powerpc/rtems/powerpc/registers.h
+++ b/c/src/exec/score/cpu/powerpc/rtems/powerpc/registers.h
@@ -64,6 +64,7 @@ extern "C" {
#define HID0_ICFI (1<<11) /* Instruction Cache Flash Invalidate */
#define HID0_DCI (1<<10) /* Data Cache Invalidate */
#define HID0_SIED (1<<7) /* Serial Instruction Execution [Disable] */
+#define HID0_BTIC (1<<5) /* Branch Target Instruction Cache [Enable] */
#define HID0_BHTE (1<<2) /* Branch History Table Enable */
#define HID0_BTCD (1<<1) /* Branch target cache disable */
diff --git a/c/src/exec/score/cpu/powerpc/rtems/score/ppc.h b/c/src/exec/score/cpu/powerpc/rtems/score/ppc.h
index 324bbab1a0..7071a6733c 100644
--- a/c/src/exec/score/cpu/powerpc/rtems/score/ppc.h
+++ b/c/src/exec/score/cpu/powerpc/rtems/score/ppc.h
@@ -268,6 +268,14 @@ extern "C" {
#define PPC_I_CACHE 16384
#define PPC_D_CACHE 16384
+#elif defined(mpc7400)
+
+#define CPU_MODEL_NAME "PowerPC 7400"
+
+#define PPC_ALIGNMENT 8
+#define PPC_I_CACHE 32768
+#define PPC_D_CACHE 32768
+
#elif defined(mpc8260)
/*
* Added by Andy Dachs <a.dachs@sstl.co.uk> 23/11/2000