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authorJoel Sherrill <joel.sherrill@OARcorp.com>2002-05-01 22:35:52 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2002-05-01 22:35:52 +0000
commit5a715de40918a33679d0a92710e82e9bb34dae7d (patch)
tree86b726449a6ce7c9332fc324e8c94e7af31550c3 /c/src/exec/score
parent2002-03-20 Chris Johns <ccj@acm.org> (diff)
downloadrtems-5a715de40918a33679d0a92710e82e9bb34dae7d.tar.bz2
2002-04-30 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* rtems/score/ppc.h: Remove rtems_multilib. Add mpc555 (Based on comments from Sergei Organov <osv@javad.ru>). * rtems/old-exceptions/cpu.h: Remove _CPU_Data_Cache_Block_Flush. Remove _CPU_Data_Cache_Block_Invalidate.
Diffstat (limited to 'c/src/exec/score')
-rw-r--r--c/src/exec/score/cpu/powerpc/ChangeLog7
-rw-r--r--c/src/exec/score/cpu/powerpc/rtems/old-exceptions/cpu.h20
-rw-r--r--c/src/exec/score/cpu/powerpc/rtems/score/ppc.h34
3 files changed, 19 insertions, 42 deletions
diff --git a/c/src/exec/score/cpu/powerpc/ChangeLog b/c/src/exec/score/cpu/powerpc/ChangeLog
index 8ef43329bb..6221f849d0 100644
--- a/c/src/exec/score/cpu/powerpc/ChangeLog
+++ b/c/src/exec/score/cpu/powerpc/ChangeLog
@@ -1,3 +1,10 @@
+2002-04-30 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
+
+ * rtems/score/ppc.h: Remove rtems_multilib.
+ Add mpc555 (Based on comments from Sergei Organov <osv@javad.ru>).
+ * rtems/old-exceptions/cpu.h: Remove _CPU_Data_Cache_Block_Flush.
+ Remove _CPU_Data_Cache_Block_Invalidate.
+
2002-04-18 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* asm.h: Include cpuopts.h instead of targopts.h.
diff --git a/c/src/exec/score/cpu/powerpc/rtems/old-exceptions/cpu.h b/c/src/exec/score/cpu/powerpc/rtems/old-exceptions/cpu.h
index 77de711862..4ab28fc368 100644
--- a/c/src/exec/score/cpu/powerpc/rtems/old-exceptions/cpu.h
+++ b/c/src/exec/score/cpu/powerpc/rtems/old-exceptions/cpu.h
@@ -765,26 +765,6 @@ void _CPU_Initialize_vectors(void);
); \
}
-
-#define _CPU_Data_Cache_Block_Flush( _address ) \
- do { register void *__address = (_address); \
- register unsigned32 _zero = 0; \
- asm volatile ( "dcbf %0,%1" : \
- "=r" (_zero), "=r" (__address) : \
- "0" (_zero), "1" (__address) \
- ); \
- } while (0)
-
-#define _CPU_Data_Cache_Block_Invalidate( _address ) \
- do { register void *__address = (_address); \
- register unsigned32 _zero = 0; \
- asm volatile ( "dcbi %0,%1" : \
- "=r" (_zero), "=r" (__address) : \
- "0" (_zero), "1" (__address) \
- ); \
- } while (0)
-
-
/*
* Enable interrupts to the previous level (returned by _CPU_ISR_Disable).
* This indicates the end of an RTEMS critical section. The parameter
diff --git a/c/src/exec/score/cpu/powerpc/rtems/score/ppc.h b/c/src/exec/score/cpu/powerpc/rtems/score/ppc.h
index ef80f00ccb..324bbab1a0 100644
--- a/c/src/exec/score/cpu/powerpc/rtems/score/ppc.h
+++ b/c/src/exec/score/cpu/powerpc/rtems/score/ppc.h
@@ -98,33 +98,12 @@ extern "C" {
#define PPC_LOW_POWER_MODE_NONE 0
#define PPC_LOW_POWER_MODE_STANDARD 1
-#if defined(rtems_multilib)
/*
* Figure out all CPU Model Feature Flags based upon compiler
* predefines.
*/
-#define CPU_MODEL_NAME "rtems_multilib"
-#define PPC_ALIGNMENT 4
-#define PPC_CACHE_ALIGNMENT 16
-#define PPC_HAS_RFCI 1
-#if defined(_SOFT_FLOAT)
-#define PPC_HAS_FPU 0
-#else
-#define PPC_HAS_FPU 1
-#endif
-
-#define PPC_USE_MULTIPLE 1
-#define PPC_I_CACHE 2048
-#define PPC_D_CACHE 1024
-#define PPC_DEBUG_MODEL PPC_DEBUG_MODEL_STANDARD
-#define PPC_HAS_EXCEPTION_PREFIX 0
-#define PPC_HAS_EVPR 0
-#define PPC_INTERRUPT_MAX 16
-#define PPC_LOW_POWER_MODE PPC_LOW_POWER_MODE_STANDARD
-#define PPC_HAS_DOUBLE 0
-
-#elif defined(ppc403) || defined(ppc405)
+#if defined(ppc403) || defined(ppc405)
/*
* IBM 403
*
@@ -150,6 +129,17 @@ extern "C" {
#define PPC_HAS_EXCEPTION_PREFIX 0
#define PPC_HAS_EVPR 1
+#elif defined(mpc555)
+
+#define CPU_MODEL_NAME "PowerPC 555"
+
+/* Copied from mpc505 */
+#define PPC_ALIGNMENT 4
+#define PPC_CACHE_ALIGNMENT 16
+
+/* Based on comments by Sergei Organov <osv@Javad.RU> */
+#define PPC_I_CACHE 0
+#define PPC_D_CACHE 0
#elif defined(mpc505) || defined(mpc509)
/*