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authorJoel Sherrill <joel.sherrill@OARcorp.com>1995-09-19 14:53:29 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>1995-09-19 14:53:29 +0000
commit3652ad356bf13abe0963c992cbbda96476d31609 (patch)
tree8ae01f1eec49c8fabc0a3db3d5b58b29a61428f2 /c/src/exec/score/cpu
parentInitial attempt at building HP PA-RISC using Solaris hosted tools. (diff)
downloadrtems-3652ad356bf13abe0963c992cbbda96476d31609.tar.bz2
Minor bug fixes to get all targets compilable and running. The
single biggest changes were the expansion of the workspace size macro to include other types of objects and the increase in the minimum stack size for most CPUs.
Diffstat (limited to '')
-rw-r--r--c/src/exec/score/cpu/hppa1.1/cpu.c9
-rw-r--r--c/src/exec/score/cpu/hppa1.1/cpu_asm.s2
-rw-r--r--c/src/exec/score/cpu/hppa1.1/hppa.h2
-rw-r--r--c/src/exec/score/cpu/hppa1.1/rtems.s2
-rw-r--r--c/src/exec/score/cpu/i386/cpu.c4
-rw-r--r--c/src/exec/score/cpu/i386/cpu.h8
-rw-r--r--c/src/exec/score/cpu/i386/i386.h4
-rw-r--r--c/src/exec/score/cpu/i960/cpu.h4
-rw-r--r--c/src/exec/score/cpu/m68k/cpu.h4
-rw-r--r--c/src/exec/score/cpu/unix/cpu.c85
10 files changed, 75 insertions, 49 deletions
diff --git a/c/src/exec/score/cpu/hppa1.1/cpu.c b/c/src/exec/score/cpu/hppa1.1/cpu.c
index 6dee0c1225..ba70357a33 100644
--- a/c/src/exec/score/cpu/hppa1.1/cpu.c
+++ b/c/src/exec/score/cpu/hppa1.1/cpu.c
@@ -193,7 +193,7 @@ void _CPU_ISR_install_vector(
void
hppa_external_interrupt_initialize(void)
{
- hppa_rtems_isr_entry ignore;
+ hppa_rtems_isr_entry ignore = 0;
/* mark them all unused */
@@ -201,8 +201,11 @@ hppa_external_interrupt_initialize(void)
DISMISS(~0);
/* install the external interrupt handler */
- rtems_interrupt_catch((rtems_isr_entry) hppa_external_interrupt,
- HPPA_INTERRUPT_EXTERNAL_INTERRUPT, &ignore) ;
+ _CPU_ISR_install_vector(
+ HPPA_INTERRUPT_EXTERNAL_INTERRUPT,
+ (proc_ptr)hppa_external_interrupt,
+ (proc_ptr *)ignore
+ );
}
/*
diff --git a/c/src/exec/score/cpu/hppa1.1/cpu_asm.s b/c/src/exec/score/cpu/hppa1.1/cpu_asm.s
index 229efed42c..7b9e940b77 100644
--- a/c/src/exec/score/cpu/hppa1.1/cpu_asm.s
+++ b/c/src/exec/score/cpu/hppa1.1/cpu_asm.s
@@ -24,7 +24,7 @@
# Division Incorporated makes no representations about the
# suitability of this software for any purpose.
#
- * $Id$
+# $Id$
#
#include <rtems/core/hppa.h>
diff --git a/c/src/exec/score/cpu/hppa1.1/hppa.h b/c/src/exec/score/cpu/hppa1.1/hppa.h
index 60bb854357..801a2edca2 100644
--- a/c/src/exec/score/cpu/hppa1.1/hppa.h
+++ b/c/src/exec/score/cpu/hppa1.1/hppa.h
@@ -636,7 +636,7 @@ get_ ## name (void) \
}
#define EMIT_SET_CONTROL(name, reg) \
-static __inline__ unsigned int \
+static __inline__ void \
set_ ## name (unsigned int new_value) \
{ \
HPPA_ASM_MTCTL(new_value, reg); \
diff --git a/c/src/exec/score/cpu/hppa1.1/rtems.s b/c/src/exec/score/cpu/hppa1.1/rtems.s
index 0e9305644e..e59be60201 100644
--- a/c/src/exec/score/cpu/hppa1.1/rtems.s
+++ b/c/src/exec/score/cpu/hppa1.1/rtems.s
@@ -14,7 +14,7 @@
* $Id$
*/
-#include <rtems/hppa.h>
+#include <rtems/core/hppa.h>
#include <rtems/core/cpu_asm.h>
.SPACE $PRIVATE$
diff --git a/c/src/exec/score/cpu/i386/cpu.c b/c/src/exec/score/cpu/i386/cpu.c
index 446515d6f9..73108e66d1 100644
--- a/c/src/exec/score/cpu/i386/cpu.c
+++ b/c/src/exec/score/cpu/i386/cpu.c
@@ -34,7 +34,7 @@ void _CPU_Initialize(
)
{
register unsigned16 fp_status asm ("ax");
- register unsigned8 *fp_context;
+ register void *fp_context;
_CPU_Table = *cpu_table;
@@ -56,7 +56,7 @@ void _CPU_Initialize(
if ( fp_status == 0 ) {
- fp_context = _CPU_Null_fp_context;
+ fp_context = &_CPU_Null_fp_context;
asm volatile( "fsave (%0)" : "=r" (fp_context)
: "0" (fp_context)
diff --git a/c/src/exec/score/cpu/i386/cpu.h b/c/src/exec/score/cpu/i386/cpu.h
index f3793cd443..f173d0cdc7 100644
--- a/c/src/exec/score/cpu/i386/cpu.h
+++ b/c/src/exec/score/cpu/i386/cpu.h
@@ -147,11 +147,9 @@ EXTERN void *_CPU_Interrupt_stack_high;
/*
* Minimum size of a thread's stack.
- *
- * NOTE: 256 bytes is probably too low in most cases.
*/
-#define CPU_STACK_MINIMUM_SIZE 256
+#define CPU_STACK_MINIMUM_SIZE 1024
/*
* i386 is pretty tolerant of alignment. Just put things on 4 byte boundaries.
@@ -232,8 +230,8 @@ unsigned32 _CPU_ISR_Get_level( void );
#define _CPU_Context_Initialize_fp( _fp_area ) \
{ \
- unsigned32 *_source = (unsigned32 *) _CPU_Null_fp_context; \
- unsigned32 *_destination = (unsigned32 *) *(_fp_area); \
+ unsigned32 *_source = (unsigned32 *) &_CPU_Null_fp_context; \
+ unsigned32 *_destination = *(_fp_area); \
unsigned32 _index; \
\
for ( _index=0 ; _index < CPU_CONTEXT_FP_SIZE/4 ; _index++ ) \
diff --git a/c/src/exec/score/cpu/i386/i386.h b/c/src/exec/score/cpu/i386/i386.h
index d43669ba53..1832d4142e 100644
--- a/c/src/exec/score/cpu/i386/i386.h
+++ b/c/src/exec/score/cpu/i386/i386.h
@@ -170,8 +170,8 @@ typedef struct {
do { \
register unsigned32 _eflags = 0; \
\
- asm volatile ( "push %0 ; \
- popf " \
+ asm volatile ( "pushf ; \
+ pop %0" \
: "=r" ((_eflags)) : "0" ((_eflags)) \
); \
\
diff --git a/c/src/exec/score/cpu/i960/cpu.h b/c/src/exec/score/cpu/i960/cpu.h
index 3c4cb98ec8..f1b1ad399e 100644
--- a/c/src/exec/score/cpu/i960/cpu.h
+++ b/c/src/exec/score/cpu/i960/cpu.h
@@ -179,7 +179,7 @@ EXTERN void *_CPU_Interrupt_stack_high;
*/
#define CPU_SYSTEM_INITIALIZATION_THREAD_EXTRA_STACK \
- (4096 - CPU_STACK_MINIMUM_SIZE)
+ (CPU_STACK_MINIMUM_SIZE)
/*
* i960 family supports 256 distinct vectors.
@@ -193,7 +193,7 @@ EXTERN void *_CPU_Interrupt_stack_high;
* NOTE: See CPU_SYSTEM_INITIALIZATION_THREAD_EXTRA_STACK
*/
-#define CPU_STACK_MINIMUM_SIZE 1024
+#define CPU_STACK_MINIMUM_SIZE 2048
/*
* i960 is pretty tolerant of alignment. Just put things on 4 byte boundaries.
diff --git a/c/src/exec/score/cpu/m68k/cpu.h b/c/src/exec/score/cpu/m68k/cpu.h
index 8379d47a00..a0aff66f4f 100644
--- a/c/src/exec/score/cpu/m68k/cpu.h
+++ b/c/src/exec/score/cpu/m68k/cpu.h
@@ -177,11 +177,9 @@ EXTERN void *_CPU_Interrupt_stack_high;
/*
* Minimum size of a thread's stack.
- *
- * NOTE: 256 bytes is probably too low in most cases.
*/
-#define CPU_STACK_MINIMUM_SIZE 256
+#define CPU_STACK_MINIMUM_SIZE 1024
/*
* m68k is pretty tolerant of alignment. Just put things on 4 byte boundaries.
diff --git a/c/src/exec/score/cpu/unix/cpu.c b/c/src/exec/score/cpu/unix/cpu.c
index 339bb2a3ce..a1994da5ae 100644
--- a/c/src/exec/score/cpu/unix/cpu.c
+++ b/c/src/exec/score/cpu/unix/cpu.c
@@ -1,5 +1,5 @@
/*
- * HP PA-RISC CPU Dependent Source
+ * UNIX Simulator Dependent Source
*
*
* To anyone who acknowledges that this file is provided "AS IS"
@@ -18,6 +18,7 @@
#include <rtems/system.h>
#include <rtems/core/isr.h>
+#include <rtems/core/interr.h>
#include <stdio.h>
#include <stdlib.h>
@@ -169,21 +170,16 @@ void _CPU_Context_From_CPU_Init()
*/
_CPU_ISR_Set_level( 0 );
- setjmp( _CPU_Context_Default_with_ISRs_enabled.regs );
- sigprocmask(
- SIG_SETMASK, /* ignored when second arg is NULL */
- 0,
- &_CPU_Context_Default_with_ISRs_enabled.isr_level
+ _CPU_Context_switch(
+ &_CPU_Context_Default_with_ISRs_enabled,
+ &_CPU_Context_Default_with_ISRs_enabled
);
_CPU_ISR_Set_level( 1 );
- setjmp( _CPU_Context_Default_with_ISRs_disabled.regs );
- sigprocmask(
- SIG_SETMASK, /* ignored when second arg is NULL */
- 0,
- &_CPU_Context_Default_with_ISRs_disabled.isr_level
+ _CPU_Context_switch(
+ &_CPU_Context_Default_with_ISRs_disabled,
+ &_CPU_Context_Default_with_ISRs_disabled
);
-
}
/*PAGE
@@ -191,21 +187,21 @@ void _CPU_Context_From_CPU_Init()
* _CPU_ISR_Get_level
*/
+sigset_t GET_old_mask;
+
unsigned32 _CPU_ISR_Get_level( void )
{
- sigset_t sigset;
+/* sigset_t old_mask; */
+ unsigned32 old_level;
- sigprocmask( 0, 0, &sigset );
-
- /*
- * This is an educated guess based on ONLY ONE of the signals we
- * disable/enable to mask ISRs.
- */
+ sigprocmask(0, 0, &GET_old_mask);
+
+ if (memcmp((void *)&posix_empty_mask, (void *)&GET_old_mask, sizeof(sigset_t)))
+ old_level = 1;
+ else
+ old_level = 0;
- if ( sigismember( &sigset, SIGUSR1 ) )
- return 1;
- else
- return 0;
+ return old_level;
}
/* _CPU_Initialize
@@ -383,7 +379,7 @@ void _CPU_Context_Initialize(
else
source = _CPU_Context_Default_with_ISRs_disabled.regs;
- memcpy(_the_context, source, sizeof(jmp_buf));
+ memcpy(_the_context, source, sizeof(Context_Control) ); /* sizeof(jmp_buf)); */
addr = (unsigned32 *)_the_context;
@@ -470,15 +466,30 @@ void _CPU_Context_switch(
Context_Control *next
)
{
+ int status;
+
/*
* Switch levels in one operation
*/
- sigprocmask( SIG_SETMASK, &next->isr_level, &current->isr_level );
+ status = sigprocmask( SIG_SETMASK, &next->isr_level, &current->isr_level );
+ if ( status )
+ _Internal_error_Occurred(
+ INTERNAL_ERROR_CORE,
+ TRUE,
+ status
+ );
if (setjmp(current->regs) == 0) { /* Save the current context */
longjmp(next->regs, 0); /* Switch to the new context */
+ if ( status )
+ _Internal_error_Occurred(
+ INTERNAL_ERROR_CORE,
+ TRUE,
+ status
+ );
}
+
}
/*PAGE
@@ -510,11 +521,18 @@ void _CPU_Restore_float_context(
unsigned32 _CPU_ISR_Disable_support(void)
{
+ int status;
sigset_t old_mask;
- sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, &old_mask);
+ status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, &old_mask);
+ if ( status )
+ _Internal_error_Occurred(
+ INTERNAL_ERROR_CORE,
+ TRUE,
+ status
+ );
- if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t)) != 0)
+ if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t)))
return 1;
return 0;
@@ -529,10 +547,19 @@ void _CPU_ISR_Enable(
unsigned32 level
)
{
+ int status;
+
if (level == 0)
- sigprocmask(SIG_UNBLOCK, &_CPU_Signal_mask, 0);
+ status = sigprocmask(SIG_UNBLOCK, &_CPU_Signal_mask, 0);
else
- sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, 0);
+ status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, 0);
+
+ if ( status )
+ _Internal_error_Occurred(
+ INTERNAL_ERROR_CORE,
+ TRUE,
+ status
+ );
}
/*PAGE