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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-07-11 21:16:53 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-07-11 21:16:53 +0000 |
| commit | 4159370f5dbf77526a900a5374a1cd7c634937b8 (patch) | |
| tree | 402ba2c911feb991ca00e64d847fef4d4265d2b8 /c/src/exec/score/cpu/sparc/cpu.c | |
| parent | Added Hitachi H8/300 to the list of CPUs that should be OK with (diff) | |
| download | rtems-4159370f5dbf77526a900a5374a1cd7c634937b8.tar.bz2 | |
Reworked score/cpu/sparc so it can be safely compiled multilib. All
routines and structures that require CPU model specific information
are now in libcpu. This primarily required moving erc32 specific
information from score/cpu files to libcpu/sparc and the erc32 BSP.
Diffstat (limited to 'c/src/exec/score/cpu/sparc/cpu.c')
| -rw-r--r-- | c/src/exec/score/cpu/sparc/cpu.c | 54 |
1 files changed, 0 insertions, 54 deletions
diff --git a/c/src/exec/score/cpu/sparc/cpu.c b/c/src/exec/score/cpu/sparc/cpu.c index 9a78a0fc96..2ba0815058 100644 --- a/c/src/exec/score/cpu/sparc/cpu.c +++ b/c/src/exec/score/cpu/sparc/cpu.c @@ -8,23 +8,12 @@ * found in the file LICENSE in this distribution or at * http://www.OARcorp.com/rtems/license.html. * - * Ported to ERC32 implementation of the SPARC by On-Line Applications - * Research Corporation (OAR) under contract to the European Space - * Agency (ESA). - * - * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. - * European Space Agency. - * * $Id$ */ #include <rtems/system.h> #include <rtems/score/isr.h> -#if defined(erc32) -#include <erc32.h> -#endif - /* * This initializes the set of opcodes placed in each trap * table entry. The routine which installs a handler is responsible @@ -111,20 +100,6 @@ void _CPU_Initialize( */ _CPU_Table = *cpu_table; - -#if defined(erc32) - - /* - * ERC32 specific initialization - */ - - _ERC32_MEC_Timer_Control_Mirror = 0; - ERC32_MEC.Timer_Control = 0; - - ERC32_MEC.Control |= ERC32_CONFIGURATION_POWER_DOWN_ALLOWED; - -#endif - } /*PAGE @@ -377,32 +352,3 @@ void _CPU_Context_Initialize( #endif the_context->psr = tmp_psr; } - -/*PAGE - * - * _CPU_Thread_Idle_body - * - * Some SPARC implementations have low power, sleep, or idle modes. This - * tries to take advantage of those models. - */ - -#if (CPU_PROVIDES_IDLE_THREAD_BODY == TRUE) - -/* - * This is the implementation for the erc32. - * - * NOTE: Low power mode was enabled at initialization time. - */ - -#if defined(erc32) - -void _CPU_Thread_Idle_body( void ) -{ - while (1) { - ERC32_MEC.Power_Down = 0; /* value is irrelevant */ - } -} - -#endif - -#endif /* CPU_PROVIDES_IDLE_THREAD_BODY */ |