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author | Joel Sherrill <joel.sherrill@OARcorp.com> | 1999-11-18 21:22:58 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 1999-11-18 21:22:58 +0000 |
commit | 4a238002e71ec018723229f8669363a5ffb7302e (patch) | |
tree | fc5a57faf9a30225bd1f3fa2d713b85815cb77ef /c/src/exec/score/cpu/sh/rtems/score/cpu.h | |
parent | Corrected to include extra arguments for simulators on sparc (diff) | |
download | rtems-4a238002e71ec018723229f8669363a5ffb7302e.tar.bz2 |
Patch from "John M. Mills" <jmills@tga.com> with subsequent cleanup from
Ralf Corsepius <corsepiu@faw.uni-ulm.de> that adds initial Hitachi SH-2
support to RTEMS. Ralf's comments are:
Changes:
------
1. SH-Port:
* Many files renamed.
* CONSOLE_DEVNAME and MHZ defines removed from libcpu.
* console.c moved to libbsp/sh/shared, build in libbsp/sh/<BSP>/console
applying VPATH.
* CONSOLE_DEVNAME made BSP-specific, replacement is defined in bsp.h
* MHZ define replaced with HZ (extendent resolution) in custom/*.cfg
* -DHZ=HZ used in bspstart.c, only
* Makefile variable HZ used in bsp-dependent directories only.
2. SH1-Port
* clock-driver rewritten to provide better resolution for odd CPU
frequencies. This driver is only partially tested on hardware, ie.
sightly experimental, but I don't expect severe problems with it.
* Polling SCI-driver added. This driver is experimental and completly
untested yet. Therefore it is not yet used for the console (/dev/console
is still pointing to /dev/null, cf. gensh1/bsp.h).
* minor changes to the timer driver
* SH1 specific delay()/CPU_delay() now is implemented as a function
3. SH2-Port
* Merged
* IMO, the code is still in its infancy. Therefore I have interspersed
comments (FIXME) it for items which I think John should look after.
* sci and console drivers partially rewritten and extended (John, I hope
you don't mind).
* Copyright notices are not yet adapted
Diffstat (limited to '')
-rw-r--r-- | c/src/exec/score/cpu/sh/rtems/score/cpu.h | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/c/src/exec/score/cpu/sh/rtems/score/cpu.h b/c/src/exec/score/cpu/sh/rtems/score/cpu.h index 8a18848f09..dedd11c055 100644 --- a/c/src/exec/score/cpu/sh/rtems/score/cpu.h +++ b/c/src/exec/score/cpu/sh/rtems/score/cpu.h @@ -377,6 +377,7 @@ typedef struct { void * (*stack_allocate_hook)( unsigned32 ); void (*stack_free_hook)( void* ); /* end of fields required on all CPUs */ + unsigned32 clicks_per_second ; /* cpu frequency in Hz */ } rtems_cpu_table; /* @@ -388,8 +389,9 @@ typedef struct { * Macros to access SH specific additions to the CPU Table */ -/* There are no CPU specific additions to the CPU Table for this port. */ - +#define rtems_cpu_configuration_get_clicks_per_second() \ + (_CPU_Table.clicks_per_second) + /* * This variable is optional. It is used on CPUs on which it is difficult * to generate an "uninitialized" FP context. It is filled in by @@ -434,6 +436,7 @@ SCORE_EXTERN void (*_CPU_Thread_dispatch_pointer)(); */ /* XXX: if needed, put more variables here */ +SCORE_EXTERN void CPU_delay( unsigned32 microseconds ); /* * The size of the floating point context area. On some CPUs this @@ -637,7 +640,7 @@ SCORE_EXTERN void _CPU_Context_Initialize( * * Other models include (1) not doing anything, and (2) putting * a "null FP status word" in the correct place in the FP context. - * SH has no FPU !!!!!!!!!!!! + * SH1, SH2, SH3 have no FPU, but the SH3e and SH4 have. */ #define _CPU_Context_Initialize_fp( _destination ) \ |