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author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2002-07-16 22:26:14 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2002-07-16 22:26:14 +0000 |
commit | dc3848d0bce537e2332f27c2e46dda673890a36e (patch) | |
tree | 8a91c7860f7e64831c63f2e8448b2ab103c683ef /c/src/exec/score/cpu/mips | |
parent | 2002-07-16 Joel Sherrill <joel@OARcorp.com> (diff) | |
download | rtems-dc3848d0bce537e2332f27c2e46dda673890a36e.tar.bz2 |
2002-07-16 Greg Menke <gregory.menke@gsfc.nasa.gov>
* cpu_asm.S: Added SR_IEO to context restore to fix isr disabled
deadlock caused by interrupt arriving while dispatching.
Diffstat (limited to 'c/src/exec/score/cpu/mips')
-rw-r--r-- | c/src/exec/score/cpu/mips/ChangeLog | 7 | ||||
-rw-r--r-- | c/src/exec/score/cpu/mips/cpu_asm.S | 4 |
2 files changed, 8 insertions, 3 deletions
diff --git a/c/src/exec/score/cpu/mips/ChangeLog b/c/src/exec/score/cpu/mips/ChangeLog index b17132b015..0480a7d542 100644 --- a/c/src/exec/score/cpu/mips/ChangeLog +++ b/c/src/exec/score/cpu/mips/ChangeLog @@ -1,3 +1,8 @@ +2002-07-16 Greg Menke <gregory.menke@gsfc.nasa.gov> + + * cpu_asm.S: Added SR_IEO to context restore to fix isr disabled + deadlock caused by interrupt arriving while dispatching. + 2002-07-05 Ralf Corsepius <corsepiu@faw.uni-ulm.de> * configure.ac: RTEMS_TOP(../../../..). @@ -72,7 +77,7 @@ end of the frame gdb cares about, so doesn't affect gdb or cpu.h stuff. * rtems/score/cpu.h: added an #ifdef so cpu_asm.S can include it - to obtain FPU defines without systax errors generated by the C + to obtain FPU defines without syntax errors generated by the C defintions. * cpu.c: Improved interrupt level saves & restores. diff --git a/c/src/exec/score/cpu/mips/cpu_asm.S b/c/src/exec/score/cpu/mips/cpu_asm.S index 657c490d96..9614705e44 100644 --- a/c/src/exec/score/cpu/mips/cpu_asm.S +++ b/c/src/exec/score/cpu/mips/cpu_asm.S @@ -56,7 +56,7 @@ * left it in... */ -#define INSTRUMENT_ISR_VECTORING +/* #define INSTRUMENT_ISR_VECTORING */ /* #define INSTRUMENT_EXECUTING_THREAD */ @@ -484,7 +484,7 @@ _CPU_Context_switch_restore: #if __mips == 3 or t2,SR_EXL + SR_IE #elif __mips == 1 - or t2,SR_IEC + SR_IEP /* save current & previous int enable */ + or t2,SR_IEC + SR_IEP + SR_IEO /* save current & previous int enable */ #endif and t0,t2 /* keep only the per-task bits */ |