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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2002-03-20 18:16:07 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2002-03-20 18:16:07 +0000 |
| commit | 25d3d4d16c33905e5a2320698c1bba099efe1813 (patch) | |
| tree | 5a0b71e5f02858851e90d46a2ad5ce4e9f8e291f /c/src/exec/score/cpu/mips/cpu_asm.S | |
| parent | 2001-03-20 Joel Sherrill <joel@OARcorp.com> (diff) | |
| download | rtems-25d3d4d16c33905e5a2320698c1bba099efe1813.tar.bz2 | |
2002-03-20 Greg Menke <gregory.menke@gsfc.nasa.gov>
* cpu_asm.S: Now compiles on 4600 and 4650.
Diffstat (limited to '')
| -rw-r--r-- | c/src/exec/score/cpu/mips/cpu_asm.S | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/c/src/exec/score/cpu/mips/cpu_asm.S b/c/src/exec/score/cpu/mips/cpu_asm.S index 63796714c1..657c490d96 100644 --- a/c/src/exec/score/cpu/mips/cpu_asm.S +++ b/c/src/exec/score/cpu/mips/cpu_asm.S @@ -674,9 +674,16 @@ _ISR_Handler_Exception: /* CP0 special registers */ +#if __mips == 1 MFC0 t0,C0_TAR +#endif MFC0 t1,C0_BADVADDR + +#if __mips == 1 STREG t0,R_TAR*R_SZ(sp) +#else + NOP +#endif STREG t1,R_BADVADDR*R_SZ(sp) #if ( CPU_HARDWARE_FP == TRUE ) |