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authorJoel Sherrill <joel.sherrill@OARcorp.com>2001-01-08 18:16:51 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2001-01-08 18:16:51 +0000
commit1800f71707063d8de2458b237e56497b63ab3f73 (patch)
tree8801625f12971a7cf5e05cc8cbd2619986c7a792 /c/src/exec/score/cpu/mips/ChangeLog
parent2001-01-08 Joel Sherrill <joel@OARcorp.com> (diff)
downloadrtems-1800f71707063d8de2458b237e56497b63ab3f73.tar.bz2
2001-01-08 Joel Sherrill <joel@OARcorp.com>
* idtcpu.h: Commented out definition of "wait". It was stupid to use such a common word as a macro. * rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3. * rtems/score/mips.h: Added include of <idtcpu.h>. * rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected.
Diffstat (limited to 'c/src/exec/score/cpu/mips/ChangeLog')
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diff --git a/c/src/exec/score/cpu/mips/ChangeLog b/c/src/exec/score/cpu/mips/ChangeLog
index aa76ef66c0..39322e3962 100644
--- a/c/src/exec/score/cpu/mips/ChangeLog
+++ b/c/src/exec/score/cpu/mips/ChangeLog
@@ -1,3 +1,11 @@
+2001-01-08 Joel Sherrill <joel@OARcorp.com>
+
+ * idtcpu.h: Commented out definition of "wait". It was stupid to
+ use such a common word as a macro.
+ * rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3.
+ * rtems/score/mips.h: Added include of <idtcpu.h>.
+ * rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected.
+
2001-01-03 Joel Sherrill <joel@OARcorp.com>
* rtems/score/cpu.h: Added _CPU_Initialize_vectors().