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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 1999-10-27 15:29:18 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 1999-10-27 15:29:18 +0000 |
| commit | 702c5f5b42e975c35a94f1ae3d39a77815f36f70 (patch) | |
| tree | 46a9caa5230280f7c51530aeeff50355f893083c /c/src/exec/score/cpu/i960/rtems/score/cpu.h | |
| parent | First attempt at icluding Eric Valette and Emmanuel Raguet. (diff) | |
| download | rtems-702c5f5b42e975c35a94f1ae3d39a77815f36f70.tar.bz2 | |
The rxgen960 BSP and i960 RPM support was submitted by Mark Bronson
<mark@ramix.com> of RAMIX.
Diffstat (limited to 'c/src/exec/score/cpu/i960/rtems/score/cpu.h')
| -rw-r--r-- | c/src/exec/score/cpu/i960/rtems/score/cpu.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/c/src/exec/score/cpu/i960/rtems/score/cpu.h b/c/src/exec/score/cpu/i960/rtems/score/cpu.h index 703abab583..14083d9860 100644 --- a/c/src/exec/score/cpu/i960/rtems/score/cpu.h +++ b/c/src/exec/score/cpu/i960/rtems/score/cpu.h @@ -215,10 +215,12 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high; #define CPU_STACK_MINIMUM_SIZE 2048 /* - * i960 is pretty tolerant of alignment. Just put things on 4 byte boundaries. + * i960 is pretty tolerant of alignment but some CPU models do + * better with different default aligments so we use what the + * CPU model selected in rtems/score/i960.h. */ -#define CPU_ALIGNMENT 4 +#define CPU_ALIGNMENT I960_CPU_ALIGNMENT #define CPU_HEAP_ALIGNMENT CPU_ALIGNMENT #define CPU_PARTITION_ALIGNMENT CPU_ALIGNMENT |