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authorJoel Sherrill <joel.sherrill@OARcorp.com>1998-08-19 20:09:59 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>1998-08-19 20:09:59 +0000
commit8b2ee37c3806d5340cb3457bfce0b80730468e59 (patch)
tree01288b2cd0a7b89f286c5390e9d71e66a847b238 /c/src/exec/score/cpu/i386/cpu.h
parentFixed obsolete reference to BSDINSTALL. (diff)
downloadrtems-8b2ee37c3806d5340cb3457bfce0b80730468e59.tar.bz2
Patch from Eric Valette <valette@crf.canon.fr>:
- Use the "hlt" instruction for the Idle thread, - Optimise interrupt PATH leadding to thread wakeup, - Preparation for Intel exception management that should come before the end of the week...
Diffstat (limited to '')
-rw-r--r--c/src/exec/score/cpu/i386/cpu.h33
1 files changed, 29 insertions, 4 deletions
diff --git a/c/src/exec/score/cpu/i386/cpu.h b/c/src/exec/score/cpu/i386/cpu.h
index 4bca613eb7..9785730000 100644
--- a/c/src/exec/score/cpu/i386/cpu.h
+++ b/c/src/exec/score/cpu/i386/cpu.h
@@ -64,7 +64,7 @@ extern "C" {
#define CPU_IDLE_TASK_IS_FP FALSE
#define CPU_USE_DEFERRED_FP_SWITCH TRUE
-#define CPU_PROVIDES_IDLE_THREAD_BODY FALSE
+#define CPU_PROVIDES_IDLE_THREAD_BODY YES
#define CPU_STACK_GROWS_UP FALSE
#define CPU_STRUCTURE_ALIGNMENT
@@ -101,14 +101,39 @@ typedef struct {
/* 28 bytes for environment */
} Context_Control_fp;
+
/*
* The following structure defines the set of information saved
- * on the current stack by RTEMS upon receipt of each interrupt.
+ * on the current stack by RTEMS upon receipt of execptions.
+ *
+ * idtIndex is either the interrupt number or the trap/exception number.
+ * faultCode is the code pushed by the processor on some exceptions.
*/
typedef struct {
- unsigned32 TBD; /* XXX Fix for this CPU */
-} CPU_Interrupt_frame;
+
+ unsigned32 edi,
+ esi,
+ ebp,
+ esp0,
+ ebx,
+ edx,
+ ecx,
+ eax,
+ idtIndex,
+ faultCode,
+ eip,
+ cs,
+ eflags;
+}CPU_Exception_frame;
+
+/*
+ * The following structure defines the set of information saved
+ * on the current stack by RTEMS upon receipt of each interrupt
+ * that will lead to re-enter the kernel to signal the thread.
+ */
+
+typedef CPU_Exception_frame CPU_Interrupt_frame;
/*
* The following table contains the information required to configure