diff options
| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 1996-05-23 15:37:38 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 1996-05-23 15:37:38 +0000 |
| commit | 8b2ecf8546179dcdabbe691338ebcf3a43960663 (patch) | |
| tree | 5837256081cce6ea30474b5cdbbf26f6821b362e /c/src/exec/score/cpu/hppa1.1/cpu_asm.s | |
| parent | added code to insure that delay is always non-zero (diff) | |
| download | rtems-8b2ecf8546179dcdabbe691338ebcf3a43960663.tar.bz2 | |
updates from Tony Bennett
Diffstat (limited to '')
| -rw-r--r-- | c/src/exec/score/cpu/hppa1.1/cpu_asm.s | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/c/src/exec/score/cpu/hppa1.1/cpu_asm.s b/c/src/exec/score/cpu/hppa1.1/cpu_asm.s index 12814eda6e..bf0d4b0bee 100644 --- a/c/src/exec/score/cpu/hppa1.1/cpu_asm.s +++ b/c/src/exec/score/cpu/hppa1.1/cpu_asm.s @@ -424,12 +424,15 @@ _CPU_Context_restore: ldw R27_OFFSET(arg0),%r27 ldw R28_OFFSET(arg0),%r28 ldw R29_OFFSET(arg0),%r29 - ldw R30_OFFSET(arg0),%r30 +# skipping r30 (sp) until we turn off interrupts ldw R31_OFFSET(arg0),%r31 -# Turn off Q & R & I so we can write interrupt control registers +# Turn off Q & R & I so we can write r30 and interrupt control registers rsm HPPA_PSW_Q + HPPA_PSW_R + HPPA_PSW_I, %r0 +# now safe to restore r30 + ldw R30_OFFSET(arg0),%r30 + ldw IPSW_OFFSET(arg0), %r25 mtctl %r25, ipsw |