diff options
| author | Hesham Almatary <Hesham.Almatary@cl.cam.ac.uk> | 2018-05-28 12:14:12 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-06-27 08:58:17 +0200 |
| commit | 92388f6941b75a43ae9f3db27402fc270536625c (patch) | |
| tree | 0a92b6085c7e5d07d6cc6c3ef118baf8f501df28 /bsps | |
| parent | bsp/riscv_generic: New linker command file (diff) | |
| download | rtems-92388f6941b75a43ae9f3db27402fc270536625c.tar.bz2 | |
bsps/riscv_generic: Rename and add variants
Add BSP variants to match supported RISC-V ISA variants (multilibs).
Diffstat (limited to 'bsps')
| -rw-r--r-- | bsps/riscv/riscv_generic/config/rv32i.cfg (renamed from bsps/riscv/riscv_generic/config/riscv_generic.cfg) | 2 | ||||
| -rw-r--r-- | bsps/riscv/riscv_generic/config/rv32iac.cfg | 7 | ||||
| -rw-r--r-- | bsps/riscv/riscv_generic/config/rv32im.cfg | 7 | ||||
| -rw-r--r-- | bsps/riscv/riscv_generic/config/rv32imac.cfg | 7 | ||||
| -rw-r--r-- | bsps/riscv/riscv_generic/config/rv32imafc.cfg | 7 | ||||
| -rw-r--r-- | bsps/riscv/riscv_generic/config/rv64imac.cfg (renamed from bsps/riscv/riscv_generic/config/riscv64_generic.cfg) | 2 | ||||
| -rw-r--r-- | bsps/riscv/riscv_generic/config/rv64imafdc.cfg | 7 |
7 files changed, 37 insertions, 2 deletions
diff --git a/bsps/riscv/riscv_generic/config/riscv_generic.cfg b/bsps/riscv/riscv_generic/config/rv32i.cfg index 785ac42c67..44a74166e7 100644 --- a/bsps/riscv/riscv_generic/config/riscv_generic.cfg +++ b/bsps/riscv/riscv_generic/config/rv32i.cfg @@ -2,6 +2,6 @@ include $(RTEMS_ROOT)/make/custom/default.cfg RTEMS_CPU = riscv -CPU_CFLAGS = +CPU_CFLAGS = -march=rv32i -mabi=ilp32 CFLAGS_OPTIMIZE_V ?= -Os diff --git a/bsps/riscv/riscv_generic/config/rv32iac.cfg b/bsps/riscv/riscv_generic/config/rv32iac.cfg new file mode 100644 index 0000000000..c321aef017 --- /dev/null +++ b/bsps/riscv/riscv_generic/config/rv32iac.cfg @@ -0,0 +1,7 @@ +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = riscv + +CPU_CFLAGS = -march=rv32iac -mabi=ilp32 + +CFLAGS_OPTIMIZE_V ?= -Os diff --git a/bsps/riscv/riscv_generic/config/rv32im.cfg b/bsps/riscv/riscv_generic/config/rv32im.cfg new file mode 100644 index 0000000000..c4171ba20d --- /dev/null +++ b/bsps/riscv/riscv_generic/config/rv32im.cfg @@ -0,0 +1,7 @@ +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = riscv + +CPU_CFLAGS = -march=rv32im -mabi=ilp32 + +CFLAGS_OPTIMIZE_V ?= -Os diff --git a/bsps/riscv/riscv_generic/config/rv32imac.cfg b/bsps/riscv/riscv_generic/config/rv32imac.cfg new file mode 100644 index 0000000000..644cadb632 --- /dev/null +++ b/bsps/riscv/riscv_generic/config/rv32imac.cfg @@ -0,0 +1,7 @@ +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = riscv + +CPU_CFLAGS = -march=rv32imac -mabi=ilp32 + +CFLAGS_OPTIMIZE_V ?= -Os diff --git a/bsps/riscv/riscv_generic/config/rv32imafc.cfg b/bsps/riscv/riscv_generic/config/rv32imafc.cfg new file mode 100644 index 0000000000..2e24a2cc69 --- /dev/null +++ b/bsps/riscv/riscv_generic/config/rv32imafc.cfg @@ -0,0 +1,7 @@ +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = riscv + +CPU_CFLAGS = -march=rv32imafc -mabi=ilp32f + +CFLAGS_OPTIMIZE_V ?= -Os diff --git a/bsps/riscv/riscv_generic/config/riscv64_generic.cfg b/bsps/riscv/riscv_generic/config/rv64imac.cfg index 04897e5bba..e79bf2793b 100644 --- a/bsps/riscv/riscv_generic/config/riscv64_generic.cfg +++ b/bsps/riscv/riscv_generic/config/rv64imac.cfg @@ -2,6 +2,6 @@ include $(RTEMS_ROOT)/make/custom/default.cfg RTEMS_CPU = riscv -CPU_CFLAGS = -mcmodel=medany +CPU_CFLAGS = -march=rv64imac -mabi=lp64 CFLAGS_OPTIMIZE_V ?= -O0 -g diff --git a/bsps/riscv/riscv_generic/config/rv64imafdc.cfg b/bsps/riscv/riscv_generic/config/rv64imafdc.cfg new file mode 100644 index 0000000000..b1676670e7 --- /dev/null +++ b/bsps/riscv/riscv_generic/config/rv64imafdc.cfg @@ -0,0 +1,7 @@ +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = riscv + +CPU_CFLAGS = -march=rv64imafdc -mabi=lp64d + +CFLAGS_OPTIMIZE_V ?= -O0 -g |