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authorSebastian Huber <sebastian.huber@embedded-brains.de>2018-05-23 14:17:25 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2018-06-15 13:02:44 +0200
commit65f868cac6f7fd5c3ad02046574c19f8f4673255 (patch)
tree15103fb87ed2e7161c17006e2c077f35e3506a95 /bsps
parentAdd RTEMS_SYSINIT_CPU_COUNTER (diff)
downloadrtems-65f868cac6f7fd5c3ad02046574c19f8f4673255.tar.bz2
Add _CPU_Counter_frequency()
Add rtems_counter_frequency() API function. Use it to initialize the counter value converter via the new system initialization step (RTEMS_SYSINIT_CPU_COUNTER). This decouples the counter implementation and the counter converter. It avoids an unnecessary pull in of the 64-bit integer division from libgcc. Update #3456.
Diffstat (limited to 'bsps')
-rw-r--r--bsps/arm/altera-cyclone-v/start/bspstart.c2
-rw-r--r--bsps/arm/include/bsp/arm-a9mpcore-clock.h9
-rw-r--r--bsps/arm/lpc176x/start/system-clocks.c5
-rw-r--r--bsps/arm/lpc24xx/start/system-clocks.c5
-rw-r--r--bsps/arm/lpc32xx/start/bspstart.c6
-rw-r--r--bsps/arm/realview-pbx-a9/start/bspstart.c2
-rw-r--r--bsps/arm/shared/clock/clock-a9mpcore.c5
-rw-r--r--bsps/arm/shared/clock/clock-generic-timer.c11
-rw-r--r--bsps/arm/shared/cpucounter/cpucounter-armv7m.c23
-rw-r--r--bsps/arm/tms570/cpucounter/cpucounterread.c7
-rw-r--r--bsps/arm/xilinx-zynq/start/bspstart.c2
-rw-r--r--bsps/powerpc/beatnik/start/bspstart.c8
-rw-r--r--bsps/powerpc/gen5200/start/bspstart.c6
-rw-r--r--bsps/powerpc/gen83xx/start/bspstart.c6
-rw-r--r--bsps/powerpc/haleakala/start/bspstart.c6
-rw-r--r--bsps/powerpc/motorola_powerpc/start/bspstart.c8
-rw-r--r--bsps/powerpc/mpc55xxevb/start/bspstart.c6
-rw-r--r--bsps/powerpc/mpc8260ads/start/bspstart.c6
-rw-r--r--bsps/powerpc/mvme3100/start/bspstart.c8
-rw-r--r--bsps/powerpc/mvme5500/start/bspstart.c8
-rw-r--r--bsps/powerpc/psim/start/bspstart.c6
-rw-r--r--bsps/powerpc/qemuppc/start/bspstart.c6
-rw-r--r--bsps/powerpc/qoriq/start/bspstart.c10
-rw-r--r--bsps/powerpc/ss555/start/bspstart.c6
-rw-r--r--bsps/powerpc/t32mppc/start/bspstart.c8
-rw-r--r--bsps/powerpc/tqm8xx/start/bspstart.c6
-rw-r--r--bsps/powerpc/virtex/start/bspstart.c7
-rw-r--r--bsps/powerpc/virtex4/start/bspstart.c5
-rw-r--r--bsps/powerpc/virtex5/start/bspstart.c7
-rw-r--r--bsps/shared/dev/cpucounter/cpucounterfrequency.c20
-rw-r--r--bsps/sparc/erc32/clock/ckinit.c15
-rw-r--r--bsps/sparc/leon3/start/cpucounter.c22
32 files changed, 178 insertions, 79 deletions
diff --git a/bsps/arm/altera-cyclone-v/start/bspstart.c b/bsps/arm/altera-cyclone-v/start/bspstart.c
index 0345a4c0a7..c7eae97fdc 100644
--- a/bsps/arm/altera-cyclone-v/start/bspstart.c
+++ b/bsps/arm/altera-cyclone-v/start/bspstart.c
@@ -13,7 +13,6 @@
*/
#include <bsp/bootcard.h>
-#include <bsp/arm-a9mpcore-clock.h>
#include <bsp/fdt.h>
#include <bsp/irq-generic.h>
#include <bsp/linker-symbols.h>
@@ -95,7 +94,6 @@ static void update_clocks(void)
void bsp_start(void)
{
update_clocks();
- a9mpcore_clock_initialize_early();
bsp_interrupt_initialize();
rtems_cache_coherent_add_area(
bsp_section_nocacheheap_begin,
diff --git a/bsps/arm/include/bsp/arm-a9mpcore-clock.h b/bsps/arm/include/bsp/arm-a9mpcore-clock.h
index 9a8c653801..8d6007ba03 100644
--- a/bsps/arm/include/bsp/arm-a9mpcore-clock.h
+++ b/bsps/arm/include/bsp/arm-a9mpcore-clock.h
@@ -22,15 +22,6 @@ extern "C" {
*/
uint32_t a9mpcore_clock_periphclk(void);
-/**
- * @brief Do early clock initialization so that the CPU counter conversion
- * works.
- */
-static inline void a9mpcore_clock_initialize_early(void)
-{
- rtems_counter_initialize_converter(a9mpcore_clock_periphclk());
-}
-
#ifdef __cplusplus
}
#endif /* __cplusplus */
diff --git a/bsps/arm/lpc176x/start/system-clocks.c b/bsps/arm/lpc176x/start/system-clocks.c
index dd1a0308c6..2ec58727eb 100644
--- a/bsps/arm/lpc176x/start/system-clocks.c
+++ b/bsps/arm/lpc176x/start/system-clocks.c
@@ -109,6 +109,11 @@ unsigned lpc176x_cclk( void )
return cclk;
}
+uint32_t _CPU_Counter_frequency(void)
+{
+ return LPC176X_PCLK;
+}
+
CPU_Counter_ticks _CPU_Counter_read( void )
{
return lpc176x_get_timer1();
diff --git a/bsps/arm/lpc24xx/start/system-clocks.c b/bsps/arm/lpc24xx/start/system-clocks.c
index f64fca1bed..8a2f62b4b0 100644
--- a/bsps/arm/lpc24xx/start/system-clocks.c
+++ b/bsps/arm/lpc24xx/start/system-clocks.c
@@ -61,8 +61,11 @@ void lpc24xx_timer_initialize(void)
/* Start timer */
T1TCR = TCR_EN;
+}
- rtems_counter_initialize_converter(LPC24XX_PCLK);
+uint32_t _CPU_Counter_frequency(void)
+{
+ return LPC24XX_PCLK;
}
CPU_Counter_ticks _CPU_Counter_read(void)
diff --git a/bsps/arm/lpc32xx/start/bspstart.c b/bsps/arm/lpc32xx/start/bspstart.c
index 7ade16bbb8..c535f766d7 100644
--- a/bsps/arm/lpc32xx/start/bspstart.c
+++ b/bsps/arm/lpc32xx/start/bspstart.c
@@ -26,6 +26,11 @@
#include <bsp/bootcard.h>
#include <bsp/irq-generic.h>
+uint32_t _CPU_Counter_frequency(void)
+{
+ return LPC32XX_PERIPH_CLK;
+}
+
CPU_Counter_ticks _CPU_Counter_read(void)
{
return lpc32xx_timer();
@@ -33,6 +38,5 @@ CPU_Counter_ticks _CPU_Counter_read(void)
void bsp_start(void)
{
- rtems_counter_initialize_converter(LPC32XX_PERIPH_CLK);
bsp_interrupt_initialize();
}
diff --git a/bsps/arm/realview-pbx-a9/start/bspstart.c b/bsps/arm/realview-pbx-a9/start/bspstart.c
index 0be515c057..8660c661c9 100644
--- a/bsps/arm/realview-pbx-a9/start/bspstart.c
+++ b/bsps/arm/realview-pbx-a9/start/bspstart.c
@@ -14,11 +14,9 @@
#include <bsp.h>
#include <bsp/bootcard.h>
-#include <bsp/arm-a9mpcore-clock.h>
#include <bsp/irq-generic.h>
void bsp_start(void)
{
- a9mpcore_clock_initialize_early();
bsp_interrupt_initialize();
}
diff --git a/bsps/arm/shared/clock/clock-a9mpcore.c b/bsps/arm/shared/clock/clock-a9mpcore.c
index f9b2d08c9b..a68a627c5b 100644
--- a/bsps/arm/shared/clock/clock-a9mpcore.c
+++ b/bsps/arm/shared/clock/clock-a9mpcore.c
@@ -157,6 +157,11 @@ static void a9mpcore_clock_initialize(void)
rtems_timecounter_install(&a9mpcore_tc);
}
+uint32_t _CPU_Counter_frequency(void)
+{
+ return a9mpcore_clock_periphclk();
+}
+
CPU_Counter_ticks _CPU_Counter_read(void)
{
volatile a9mpcore_gt *gt = A9MPCORE_GT;
diff --git a/bsps/arm/shared/clock/clock-generic-timer.c b/bsps/arm/shared/clock/clock-generic-timer.c
index 8a992d44f4..2cb85003e1 100644
--- a/bsps/arm/shared/clock/clock-generic-timer.c
+++ b/bsps/arm/shared/clock/clock-generic-timer.c
@@ -166,6 +166,11 @@ static void arm_gt_clock_initialize(void)
rtems_timecounter_install(tc);
}
+uint32_t _CPU_Counter_frequency(void)
+{
+ return arm_gt_clock_instance.interval;
+}
+
CPU_Counter_ticks _CPU_Counter_read(void)
{
return (uint32_t) arm_gt_clock_get_count();
@@ -179,14 +184,12 @@ static void arm_gt_clock_early_init(void)
&arm_gt_clock_instance.interval,
&arm_gt_clock_instance.irq
);
-
- rtems_counter_initialize_converter(arm_gt_clock_instance.interval);
}
RTEMS_SYSINIT_ITEM(
arm_gt_clock_early_init,
- RTEMS_SYSINIT_BSP_START,
- RTEMS_SYSINIT_ORDER_LAST
+ RTEMS_SYSINIT_CPU_COUNTER,
+ RTEMS_SYSINIT_ORDER_FIRST
);
#define Clock_driver_support_at_tick() \
diff --git a/bsps/arm/shared/cpucounter/cpucounter-armv7m.c b/bsps/arm/shared/cpucounter/cpucounter-armv7m.c
index 7d2581879f..b7593602ed 100644
--- a/bsps/arm/shared/cpucounter/cpucounter-armv7m.c
+++ b/bsps/arm/shared/cpucounter/cpucounter-armv7m.c
@@ -19,6 +19,16 @@
#include <bsp.h>
#include <bsp/fatal.h>
+uint32_t _CPU_Counter_frequency(void)
+{
+#ifdef BSP_ARMV7M_SYSTICK_FREQUENCY
+ return = BSP_ARMV7M_SYSTICK_FREQUENCY;
+#else
+ volatile ARMV7M_Systick *systick = _ARMV7M_Systick;
+ return ARMV7M_SYSTICK_CALIB_TENMS_GET(systick->calib) * 100;
+#endif
+}
+
CPU_Counter_ticks _CPU_Counter_read(void)
{
volatile ARMV7M_DWT *dwt = _ARMV7M_DWT;
@@ -32,22 +42,13 @@ static void armv7m_cpu_counter_initialize(void)
cyccnt_enabled = _ARMV7M_DWT_Enable_CYCCNT();
- if (cyccnt_enabled) {
- #ifdef BSP_ARMV7M_SYSTICK_FREQUENCY
- uint64_t freq = BSP_ARMV7M_SYSTICK_FREQUENCY;
- #else
- volatile ARMV7M_Systick *systick = _ARMV7M_Systick;
- uint64_t freq = ARMV7M_SYSTICK_CALIB_TENMS_GET(systick->calib) * 100ULL;
- #endif
-
- rtems_counter_initialize_converter(freq);
- } else {
+ if (!cyccnt_enabled) {
bsp_fatal(BSP_ARM_ARMV7M_CPU_COUNTER_INIT);
}
}
RTEMS_SYSINIT_ITEM(
armv7m_cpu_counter_initialize,
- RTEMS_SYSINIT_BSP_START,
+ RTEMS_SYSINIT_CPU_COUNTER,
RTEMS_SYSINIT_ORDER_FIRST
);
diff --git a/bsps/arm/tms570/cpucounter/cpucounterread.c b/bsps/arm/tms570/cpucounter/cpucounterread.c
index c5e62d382d..ada65a87ed 100644
--- a/bsps/arm/tms570/cpucounter/cpucounterread.c
+++ b/bsps/arm/tms570/cpucounter/cpucounterread.c
@@ -46,8 +46,11 @@ static void tms570_cpu_counter_initialize(void)
pmcr &= ~ARM_CP15_PMCR_D;
pmcr |= ARM_CP15_PMCR_E;
arm_cp15_set_performance_monitors_control(pmcr);
+}
- rtems_counter_initialize_converter(2 * BSP_PLL_OUT_CLOCK);
+uint32_t _CPU_Counter_frequency(void)
+{
+ return 2 * BSP_PLL_OUT_CLOCK;
}
CPU_Counter_ticks _CPU_Counter_read(void)
@@ -57,6 +60,6 @@ CPU_Counter_ticks _CPU_Counter_read(void)
RTEMS_SYSINIT_ITEM(
tms570_cpu_counter_initialize,
- RTEMS_SYSINIT_BSP_START,
+ RTEMS_SYSINIT_CPU_COUNTER,
RTEMS_SYSINIT_ORDER_FIRST
);
diff --git a/bsps/arm/xilinx-zynq/start/bspstart.c b/bsps/arm/xilinx-zynq/start/bspstart.c
index 14a20df7ef..4e975e872b 100644
--- a/bsps/arm/xilinx-zynq/start/bspstart.c
+++ b/bsps/arm/xilinx-zynq/start/bspstart.c
@@ -14,7 +14,6 @@
#include <bsp.h>
#include <bsp/bootcard.h>
-#include <bsp/arm-a9mpcore-clock.h>
#include <bsp/irq-generic.h>
#include <bsp/linker-symbols.h>
@@ -25,7 +24,6 @@ __attribute__ ((weak)) uint32_t zynq_clock_cpu_1x(void)
void bsp_start(void)
{
- a9mpcore_clock_initialize_early();
bsp_interrupt_initialize();
rtems_cache_coherent_add_area(
bsp_section_nocacheheap_begin,
diff --git a/bsps/powerpc/beatnik/start/bspstart.c b/bsps/powerpc/beatnik/start/bspstart.c
index c3f2c0ceda..83c6d2efa6 100644
--- a/bsps/powerpc/beatnik/start/bspstart.c
+++ b/bsps/powerpc/beatnik/start/bspstart.c
@@ -162,6 +162,11 @@ BSP_getBoardType( void )
return board_type;
}
+uint32_t _CPU_Counter_frequency(void)
+{
+ return BSP_bus_frequency / (BSP_time_base_divisor / 1000);
+}
+
/*
* bsp_start
*
@@ -330,9 +335,6 @@ void bsp_start( void )
*/
bsp_clicks_per_usec = BSP_bus_frequency/(BSP_time_base_divisor * 1000);
- rtems_counter_initialize_converter(
- BSP_bus_frequency / (BSP_time_base_divisor / 1000)
- );
#ifdef SHOW_MORE_INIT_SETTINGS
printk(
diff --git a/bsps/powerpc/gen5200/start/bspstart.c b/bsps/powerpc/gen5200/start/bspstart.c
index 209cc7738e..8b1558ce7b 100644
--- a/bsps/powerpc/gen5200/start/bspstart.c
+++ b/bsps/powerpc/gen5200/start/bspstart.c
@@ -112,6 +112,11 @@ uint32_t bsp_time_base_frequency;
/* Legacy */
uint32_t bsp_clicks_per_usec;
+uint32_t _CPU_Counter_frequency(void)
+{
+ return bsp_time_base_frequency;
+}
+
void bsp_start(void)
{
/*
@@ -145,7 +150,6 @@ void bsp_start(void)
bsp_time_base_frequency = XLB_CLOCK / 4;
bsp_clicks_per_usec = (XLB_CLOCK/4000000);
- rtems_counter_initialize_converter(bsp_time_base_frequency);
/* Initialize exception handler */
ppc_exc_cache_wb_check = 0;
diff --git a/bsps/powerpc/gen83xx/start/bspstart.c b/bsps/powerpc/gen83xx/start/bspstart.c
index cd729a8e17..4070c56347 100644
--- a/bsps/powerpc/gen83xx/start/bspstart.c
+++ b/bsps/powerpc/gen83xx/start/bspstart.c
@@ -51,6 +51,11 @@ static int mpc83xx_decrementer_exception_handler( BSP_Exception_frame *frame, un
return 0;
}
+uint32_t _CPU_Counter_frequency(void)
+{
+ return bsp_time_base_frequency;
+}
+
void bsp_start( void)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
@@ -92,7 +97,6 @@ void bsp_start( void)
#endif /* HAS_UBOOT */
bsp_time_base_frequency = BSP_bus_frequency / 4;
bsp_clicks_per_usec = bsp_time_base_frequency / 1000000;
- rtems_counter_initialize_converter(bsp_time_base_frequency);
/* Initialize some console parameters */
for (i = 0; i < console_device_count; ++i) {
diff --git a/bsps/powerpc/haleakala/start/bspstart.c b/bsps/powerpc/haleakala/start/bspstart.c
index 18b45f33df..5f7f5efb95 100644
--- a/bsps/powerpc/haleakala/start/bspstart.c
+++ b/bsps/powerpc/haleakala/start/bspstart.c
@@ -153,6 +153,11 @@ DirectUARTWrite(const char c)
BSP_output_char_function_type BSP_output_char = DirectUARTWrite;
BSP_polling_getchar_function_type BSP_poll_char = NULL;
+uint32_t _CPU_Counter_frequency(void)
+{
+ return bsp_clicks_per_usec * 1000000;
+}
+
/*===================================================================*/
void bsp_start( void )
@@ -178,7 +183,6 @@ void bsp_start( void )
/* Set globals visible to clock.c */
/* timebase register ticks/microsecond = CPU Clk in MHz */
bsp_clicks_per_usec = 400;
- rtems_counter_initialize_converter(bsp_clicks_per_usec * 1000000);
/*
* Initialize default raw exception handlers.
diff --git a/bsps/powerpc/motorola_powerpc/start/bspstart.c b/bsps/powerpc/motorola_powerpc/start/bspstart.c
index 3ab9588af0..7fb684c759 100644
--- a/bsps/powerpc/motorola_powerpc/start/bspstart.c
+++ b/bsps/powerpc/motorola_powerpc/start/bspstart.c
@@ -119,6 +119,11 @@ static unsigned int get_eumbbar(void) {
}
#endif
+uint32_t _CPU_Counter_frequency(void)
+{
+ return BSP_bus_frequency / (BSP_time_base_divisor / 1000);
+}
+
/*
* bsp_start
*
@@ -346,9 +351,6 @@ void bsp_start( void )
* initialize the device driver parameters
*/
bsp_clicks_per_usec = BSP_bus_frequency/(BSP_time_base_divisor * 1000);
- rtems_counter_initialize_converter(
- BSP_bus_frequency / (BSP_time_base_divisor / 1000)
- );
/*
* Initalize RTEMS IRQ system
diff --git a/bsps/powerpc/mpc55xxevb/start/bspstart.c b/bsps/powerpc/mpc55xxevb/start/bspstart.c
index 9042fc3864..34d59a9ac2 100644
--- a/bsps/powerpc/mpc55xxevb/start/bspstart.c
+++ b/bsps/powerpc/mpc55xxevb/start/bspstart.c
@@ -63,6 +63,11 @@ static void null_pointer_protection(void)
#endif
}
+uint32_t _CPU_Counter_frequency(void)
+{
+ return bsp_clock_speed;
+}
+
void bsp_start(void)
{
null_pointer_protection();
@@ -82,7 +87,6 @@ void bsp_start(void)
/* Time reference value */
bsp_clicks_per_usec = bsp_clock_speed / 1000000;
- rtems_counter_initialize_converter(bsp_clock_speed);
/* Initialize exceptions */
ppc_exc_initialize_with_vector_base(
diff --git a/bsps/powerpc/mpc8260ads/start/bspstart.c b/bsps/powerpc/mpc8260ads/start/bspstart.c
index 44ec072775..6f1cc72a2c 100644
--- a/bsps/powerpc/mpc8260ads/start/bspstart.c
+++ b/bsps/powerpc/mpc8260ads/start/bspstart.c
@@ -114,6 +114,11 @@ static void _BSP_Uart2_enable(void)
csr->bcsr1 &= ~UART2_E; /* Enable Uart2 */
}
+uint32_t _CPU_Counter_frequency(void)
+{
+ return bsp_clock_speed;
+}
+
void bsp_start(void)
{
/* Set MPC8260ADS board LEDS and Uart enable lines */
@@ -171,7 +176,6 @@ void bsp_start(void)
bsp_serial_cts_rts = 0;
bsp_serial_rate = 9600;
bsp_clock_speed = 40000000;
- rtems_counter_initialize_converter(bsp_clock_speed);
#ifdef REV_0_2
/* set up some board specific registers */
diff --git a/bsps/powerpc/mvme3100/start/bspstart.c b/bsps/powerpc/mvme3100/start/bspstart.c
index 27b483332c..a073baa784 100644
--- a/bsps/powerpc/mvme3100/start/bspstart.c
+++ b/bsps/powerpc/mvme3100/start/bspstart.c
@@ -192,6 +192,11 @@ BSP_calc_freqs( void )
printk("CPU Clock Freq: %10u Hz\n", BSP_processor_frequency);
}
+uint32_t _CPU_Counter_frequency(void)
+{
+ return BSP_bus_frequency / (BSP_time_base_divisor / 1000);
+}
+
/*
* bsp_start
*
@@ -367,9 +372,6 @@ VpdBufRec vpdData [] = {
_BSP_clear_hostbridge_errors(0 /* enableMCP */, 0/*quiet*/);
bsp_clicks_per_usec = BSP_bus_frequency/(BSP_time_base_divisor * 1000);
- rtems_counter_initialize_converter(
- BSP_bus_frequency / (BSP_time_base_divisor / 1000)
- );
/*
* Initalize RTEMS IRQ system
diff --git a/bsps/powerpc/mvme5500/start/bspstart.c b/bsps/powerpc/mvme5500/start/bspstart.c
index 279524eb8f..fc7057613a 100644
--- a/bsps/powerpc/mvme5500/start/bspstart.c
+++ b/bsps/powerpc/mvme5500/start/bspstart.c
@@ -169,6 +169,11 @@ save_boot_params(
return cmdline_buf;
}
+uint32_t _CPU_Counter_frequency(void)
+{
+ return BSP_bus_frequency / (BSP_time_base_divisor / 1000);
+}
+
void bsp_start( void )
{
#ifdef CONF_VPD
@@ -265,9 +270,6 @@ void bsp_start( void )
/* P94 : 7455 TB/DECR is clocked by the system bus clock frequency */
bsp_clicks_per_usec = BSP_bus_frequency/(BSP_time_base_divisor * 1000);
- rtems_counter_initialize_converter(
- BSP_bus_frequency / (BSP_time_base_divisor / 1000)
- );
/*
* Initalize RTEMS IRQ system
diff --git a/bsps/powerpc/psim/start/bspstart.c b/bsps/powerpc/psim/start/bspstart.c
index 3a9809c022..1250715275 100644
--- a/bsps/powerpc/psim/start/bspstart.c
+++ b/bsps/powerpc/psim/start/bspstart.c
@@ -60,6 +60,11 @@ unsigned int BSP_time_base_divisor;
extern unsigned long __rtems_end[];
+uint32_t _CPU_Counter_frequency(void)
+{
+ return bsp_clicks_per_usec * 1000000;
+}
+
/*
* bsp_start
*
@@ -81,7 +86,6 @@ void bsp_start( void )
BSP_bus_frequency = (unsigned int)PSIM_INSTRUCTIONS_PER_MICROSECOND;
bsp_clicks_per_usec = BSP_bus_frequency;
BSP_time_base_divisor = 1;
- rtems_counter_initialize_converter(bsp_clicks_per_usec * 1000000);
/*
* Initialize default raw exception handlers.
diff --git a/bsps/powerpc/qemuppc/start/bspstart.c b/bsps/powerpc/qemuppc/start/bspstart.c
index 94d7f4b84d..15cf9d4207 100644
--- a/bsps/powerpc/qemuppc/start/bspstart.c
+++ b/bsps/powerpc/qemuppc/start/bspstart.c
@@ -54,6 +54,11 @@ static int default_decrementer_exception_handler( BSP_Exception_frame *frame, un
return 0;
}
+uint32_t _CPU_Counter_frequency(void)
+{
+ return bsp_time_base_frequency;
+}
+
/*
* bsp_start
*
@@ -80,7 +85,6 @@ void bsp_start( void )
BSP_bus_frequency = 20;
bsp_time_base_frequency = 20000000;
bsp_clicks_per_usec = BSP_bus_frequency;
- rtems_counter_initialize_converter(bsp_time_base_frequency);
/*
* Initialize the interrupt related settings.
diff --git a/bsps/powerpc/qoriq/start/bspstart.c b/bsps/powerpc/qoriq/start/bspstart.c
index 7d9fa0d3c7..cc7902428b 100644
--- a/bsps/powerpc/qoriq/start/bspstart.c
+++ b/bsps/powerpc/qoriq/start/bspstart.c
@@ -54,6 +54,15 @@ uint32_t bsp_time_base_frequency;
uint32_t qoriq_clock_frequency;
+uint32_t _CPU_Counter_frequency(void)
+{
+#ifdef __PPC_CPU_E6500__
+ return qoriq_clock_frequency;
+#else
+ return bsp_time_base_frequency;
+#endif
+}
+
static void initialize_frequency_parameters(void)
{
const void *fdt = bsp_fdt_get();
@@ -82,7 +91,6 @@ static void initialize_frequency_parameters(void)
}
qoriq_clock_frequency = fdt32_to_cpu(*val_fdt);
#endif
- rtems_counter_initialize_converter(fdt32_to_cpu(*val_fdt));
}
#define MTIVPR(base) \
diff --git a/bsps/powerpc/ss555/start/bspstart.c b/bsps/powerpc/ss555/start/bspstart.c
index f47ca7d5be..cf54d61d9e 100644
--- a/bsps/powerpc/ss555/start/bspstart.c
+++ b/bsps/powerpc/ss555/start/bspstart.c
@@ -40,6 +40,11 @@ extern unsigned long intrStackPtr;
uint32_t bsp_clicks_per_usec;
uint32_t bsp_clock_speed; /* Serial clocks per second */
+uint32_t _CPU_Counter_frequency(void)
+{
+ return BSP_CRYSTAL_HZ / 4;
+}
+
/*
* bsp_start()
*
@@ -88,7 +93,6 @@ void bsp_start(void)
*/
bsp_clicks_per_usec = BSP_CRYSTAL_HZ / 4 / 1000000;
bsp_clock_speed = BSP_CLOCK_HZ; /* for SCI baud rate generator */
- rtems_counter_initialize_converter(BSP_CRYSTAL_HZ / 4);
/*
* Initalize RTEMS IRQ system
diff --git a/bsps/powerpc/t32mppc/start/bspstart.c b/bsps/powerpc/t32mppc/start/bspstart.c
index 5fc36b4019..e8f288df59 100644
--- a/bsps/powerpc/t32mppc/start/bspstart.c
+++ b/bsps/powerpc/t32mppc/start/bspstart.c
@@ -77,13 +77,15 @@ static void t32mppc_initialize_exceptions(void *interrupt_stack_begin)
MTIVOR(BOOKE_IVOR35, addr);
}
+uint32_t _CPU_Counter_frequency(void)
+{
+ return bsp_time_base_frequency;
+}
+
void bsp_start(void)
{
get_ppc_cpu_type();
get_ppc_cpu_revision();
-
- rtems_counter_initialize_converter(bsp_time_base_frequency);
-
t32mppc_initialize_exceptions(bsp_section_work_begin);
bsp_interrupt_initialize();
}
diff --git a/bsps/powerpc/tqm8xx/start/bspstart.c b/bsps/powerpc/tqm8xx/start/bspstart.c
index df0581ce77..b2d765c9c4 100644
--- a/bsps/powerpc/tqm8xx/start/bspstart.c
+++ b/bsps/powerpc/tqm8xx/start/bspstart.c
@@ -92,6 +92,11 @@ static rtems_status_code bsp_tqm_get_cib_uint32( const char *cib_id,
return RTEMS_SUCCESSFUL;
}
+uint32_t _CPU_Counter_frequency(void)
+{
+ return bsp_time_base_frequency;
+}
+
void bsp_start( void)
{
@@ -142,7 +147,6 @@ void bsp_start( void)
bsp_time_base_frequency = BSP_bus_frequency / 16;
bsp_clicks_per_usec = bsp_time_base_frequency / 1000000;
- rtems_counter_initialize_converter(bsp_time_base_frequency);
/* Initialize exception handler */
ppc_exc_initialize(interrupt_stack_start, interrupt_stack_size);
diff --git a/bsps/powerpc/virtex/start/bspstart.c b/bsps/powerpc/virtex/start/bspstart.c
index 5b4a4a135f..be7f00437a 100644
--- a/bsps/powerpc/virtex/start/bspstart.c
+++ b/bsps/powerpc/virtex/start/bspstart.c
@@ -74,6 +74,11 @@ LINKER_SYMBOL(virtex_exc_vector_base);
*/
uint32_t bsp_time_base_frequency = XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ;
+uint32_t _CPU_Counter_frequency(void)
+{
+ return bsp_time_base_frequency;
+}
+
/*
* bsp_start
*
@@ -89,8 +94,6 @@ void bsp_start( void )
get_ppc_cpu_type();
get_ppc_cpu_revision();
- rtems_counter_initialize_converter(bsp_time_base_frequency);
-
/*
* Initialize default raw exception handlers.
*/
diff --git a/bsps/powerpc/virtex4/start/bspstart.c b/bsps/powerpc/virtex4/start/bspstart.c
index d5c255be6d..40cd710a58 100644
--- a/bsps/powerpc/virtex4/start/bspstart.c
+++ b/bsps/powerpc/virtex4/start/bspstart.c
@@ -130,6 +130,10 @@ void BSP_ask_for_reset(void)
for(;;);
}
+uint32_t _CPU_Counter_frequency(void)
+{
+ return bsp_clicks_per_usec * 1000000;
+}
/*===================================================================*/
@@ -166,7 +170,6 @@ void bsp_start(void)
/* Timebase register ticks/microsecond; The application may override these */
bsp_clicks_per_usec = 350;
- rtems_counter_initialize_converter(bsp_clicks_per_usec * 1000000);
/*
* Initialize the interrupt related settings.
diff --git a/bsps/powerpc/virtex5/start/bspstart.c b/bsps/powerpc/virtex5/start/bspstart.c
index ff821574a9..6457143d20 100644
--- a/bsps/powerpc/virtex5/start/bspstart.c
+++ b/bsps/powerpc/virtex5/start/bspstart.c
@@ -144,6 +144,10 @@ void BSP_ask_for_reset(void)
for(;;);
}
+uint32_t _CPU_Counter_frequency(void)
+{
+ return BSP_bus_frequency / (BSP_time_base_divisor / 1000);
+}
/*===================================================================*/
@@ -185,9 +189,6 @@ void bsp_start(void)
/* Timebase register ticks/microsecond; The application may override these */
bsp_clicks_per_usec = BSP_bus_frequency/(BSP_time_base_divisor * 1000);
- rtems_counter_initialize_converter(
- BSP_bus_frequency / (BSP_time_base_divisor / 1000)
- );
/*
* Initialize the interrupt related settings.
diff --git a/bsps/shared/dev/cpucounter/cpucounterfrequency.c b/bsps/shared/dev/cpucounter/cpucounterfrequency.c
new file mode 100644
index 0000000000..bbb8c127fe
--- /dev/null
+++ b/bsps/shared/dev/cpucounter/cpucounterfrequency.c
@@ -0,0 +1,20 @@
+/*
+ * Copyright (c) 2018 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Dornierstr. 4
+ * 82178 Puchheim
+ * Germany
+ * <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems/score/cpu.h>
+
+uint32_t _CPU_Counter_frequency( void )
+{
+ return 1000000000;
+}
diff --git a/bsps/sparc/erc32/clock/ckinit.c b/bsps/sparc/erc32/clock/ckinit.c
index 7f8c0f5aad..e54061abac 100644
--- a/bsps/sparc/erc32/clock/ckinit.c
+++ b/bsps/sparc/erc32/clock/ckinit.c
@@ -28,6 +28,8 @@
#include <rtems/timecounter.h>
#include <rtems/score/sparcimpl.h>
+#define ERC32_REAL_TIME_CLOCK_FREQUENCY 1000000
+
/*
* The Real Time Clock Counter Timer uses this trap type.
*/
@@ -78,19 +80,22 @@ static void erc32_tc_tick( void )
);
}
-static void erc32_counter_initialize( uint32_t frequency )
+static void erc32_counter_initialize( void )
{
_SPARC_Counter_initialize(
_SPARC_Counter_read_address,
_SPARC_Counter_difference_clock_period,
&ERC32_MEC.Real_Time_Clock_Counter
);
- rtems_counter_initialize_converter( frequency );
+}
+
+uint32_t _CPU_Counter_frequency(void)
+{
+ return ERC32_REAL_TIME_CLOCK_FREQUENCY;
}
#define Clock_driver_support_initialize_hardware() \
do { \
- uint32_t frequency = 1000000; \
/* approximately 1 us per countdown */ \
ERC32_MEC.Real_Time_Clock_Scalar = CLOCK_SPEED - 1; \
ERC32_MEC.Real_Time_Clock_Counter = \
@@ -108,11 +113,11 @@ static void erc32_counter_initialize( uint32_t frequency )
); \
rtems_timecounter_simple_install( \
&erc32_tc, \
- frequency, \
+ ERC32_REAL_TIME_CLOCK_FREQUENCY, \
rtems_configuration_get_microseconds_per_tick(), \
erc32_tc_get_timecount \
); \
- erc32_counter_initialize( frequency ); \
+ erc32_counter_initialize(); \
} while (0)
#define Clock_driver_timecounter_tick() erc32_tc_tick()
diff --git a/bsps/sparc/leon3/start/cpucounter.c b/bsps/sparc/leon3/start/cpucounter.c
index 87554ce550..2df1409209 100644
--- a/bsps/sparc/leon3/start/cpucounter.c
+++ b/bsps/sparc/leon3/start/cpucounter.c
@@ -18,11 +18,17 @@
#include <rtems/sysinit.h>
#include <rtems/score/sparcimpl.h>
+static uint32_t leon3_counter_frequency = 1000000000;
+
+uint32_t _CPU_Counter_frequency(void)
+{
+ return leon3_up_counter_frequency;
+}
+
static void leon3_counter_initialize(void)
{
volatile struct irqmp_timestamp_regs *irqmp_ts;
volatile struct gptimer_regs *gpt;
- unsigned int freq;
irqmp_ts = &LEON3_IrqCtrl_Regs->timestamp[0];
gpt = LEON3_Timer_Regs;
@@ -38,8 +44,7 @@ static void leon3_counter_initialize(void)
NULL
);
- freq = leon3_up_counter_frequency();
- rtems_counter_initialize_converter(freq);
+ leon3_counter_frequency = leon3_up_counter_frequency();
} else if (leon3_irqmp_has_timestamp(irqmp_ts)) {
/* Use the interrupt controller timestamp counter if available */
@@ -52,8 +57,7 @@ static void leon3_counter_initialize(void)
(volatile const uint32_t *) &irqmp_ts->counter
);
- freq = ambapp_freq_get(&ambapp_plb, LEON3_IrqCtrl_Adev);
- rtems_counter_initialize_converter(freq);
+ leon3_counter_frequency = ambapp_freq_get(&ambapp_plb, LEON3_IrqCtrl_Adev);
} else if (gpt != NULL) {
/* Fall back to the first GPTIMER if available */
@@ -66,15 +70,15 @@ static void leon3_counter_initialize(void)
(volatile const uint32_t *) &gpt->timer[LEON3_CLOCK_INDEX].value
);
- freq = ambapp_freq_get(&ambapp_plb, LEON3_Timer_Adev);
- rtems_counter_initialize_converter(freq / (gpt->scaler_reload - 1));
+ leon3_counter_frequency = ambapp_freq_get(&ambapp_plb, LEON3_Timer_Adev) /
+ (gpt->scaler_reload - 1);
}
}
RTEMS_SYSINIT_ITEM(
leon3_counter_initialize,
- RTEMS_SYSINIT_BSP_START,
- RTEMS_SYSINIT_ORDER_THIRD
+ RTEMS_SYSINIT_CPU_COUNTER,
+ RTEMS_SYSINIT_ORDER_FIRST
);
SPARC_COUNTER_DEFINITION;