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authorChris Johns <chrisj@rtems.org>2023-04-10 17:43:47 -1000
committerChris Johns <chris@contemporary.net.au>2023-04-11 14:54:54 +1000
commit25e1a1140283e440d06d4af544d02a46997ba495 (patch)
treeae1cdada3cec425d17a5cc16b3012a8ecac2db87 /bsps
parentbsps/motorola_powerpc: Add spec support for BSP defines (diff)
downloadrtems-25e1a1140283e440d06d4af544d02a46997ba495.tar.bz2
bsps/motorola_powerpc: Change defines from BSP names to avoid clash
- Change mvme2100 to mot_pcc_mvme2100 to avoid clashing with the RTEMS_BSP value for the BSP. You cannot have a define that is the BSP name.
Diffstat (limited to 'bsps')
-rw-r--r--bsps/mips/include/bsp/i8259.h4
-rw-r--r--bsps/powerpc/motorola_powerpc/include/bsp.h6
-rw-r--r--bsps/powerpc/motorola_powerpc/include/bsp/VMEConfig.h2
-rw-r--r--bsps/powerpc/motorola_powerpc/include/bsp/irq.h2
-rw-r--r--bsps/powerpc/motorola_powerpc/start/bspreset.c2
-rw-r--r--bsps/powerpc/motorola_powerpc/start/bspstart.c10
-rw-r--r--bsps/powerpc/motorola_powerpc/start/motorola.c2
-rw-r--r--bsps/powerpc/shared/irq/irq_init.c6
-rw-r--r--bsps/powerpc/shared/pci/detect_raven_bridge.c2
-rw-r--r--bsps/powerpc/shared/rtc/todcfg.c6
10 files changed, 21 insertions, 21 deletions
diff --git a/bsps/mips/include/bsp/i8259.h b/bsps/mips/include/bsp/i8259.h
index 1a947829b0..29e3853874 100644
--- a/bsps/mips/include/bsp/i8259.h
+++ b/bsps/mips/include/bsp/i8259.h
@@ -37,7 +37,7 @@
* @{
*/
-#if 1
+#if 1
#define ISA8259_M_ELCR 0x4d0
#define ISA8259_S_ELCR 0x4d1
#endif
@@ -169,7 +169,7 @@ extern "C" {
/** @} */
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
#define BSP_DEC21143_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 1)
#define BSP_PMC_PCMIP_TYPE1_SLOT0_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 2)
#define BSP_PCMIP_TYPE1_SLOT1_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 3)
diff --git a/bsps/powerpc/motorola_powerpc/include/bsp.h b/bsps/powerpc/motorola_powerpc/include/bsp.h
index db0995fa5c..d44bcd5cff 100644
--- a/bsps/powerpc/motorola_powerpc/include/bsp.h
+++ b/bsps/powerpc/motorola_powerpc/include/bsp.h
@@ -89,7 +89,7 @@ extern "C" {
*/
/* fundamental addresses for BSP (CHRPxxx and PREPxxx are from libcpu/io.h) */
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
#define _IO_BASE CHRP_ISA_IO_BASE
#define _ISA_MEM_BASE CHRP_ISA_MEM_BASE
/* address of our ram on the PCI bus */
@@ -154,7 +154,7 @@ extern "C" {
* find out what it is which is VERY different from other Motorola boards.
*/
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
#define BSP_UART_IOBASE_COM1 ((_IO_BASE)+0x01e10000)
/* #define BSP_UART_IOBASE_COM1 (0xffe10000) */
#define BSP_OPEN_PIC_BASE_OFFSET 0x40000
@@ -169,7 +169,7 @@ extern "C" {
#define BSP_VGA_IOBASE ((_IO_BASE)+0x3c0)
#endif
-#if defined(mvme2300) || defined(mvme2307) || defined(mvme2700)
+#if defined(mvme2300) || defined(mot_ppc_mvme2307) || defined(mot_ppc_mvme2700)
#define MVME_HAS_DEC21140
#endif
#endif
diff --git a/bsps/powerpc/motorola_powerpc/include/bsp/VMEConfig.h b/bsps/powerpc/motorola_powerpc/include/bsp/VMEConfig.h
index 9b355819f1..9e57730d60 100644
--- a/bsps/powerpc/motorola_powerpc/include/bsp/VMEConfig.h
+++ b/bsps/powerpc/motorola_powerpc/include/bsp/VMEConfig.h
@@ -66,7 +66,7 @@
* available and unused!
*/
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
#define _VME_A32_WIN0_ON_PCI 0x90000000
#define _VME_A24_ON_PCI 0x9f000000
#define _VME_A16_ON_PCI 0x9fff0000
diff --git a/bsps/powerpc/motorola_powerpc/include/bsp/irq.h b/bsps/powerpc/motorola_powerpc/include/bsp/irq.h
index fea2859c3e..74bda323eb 100644
--- a/bsps/powerpc/motorola_powerpc/include/bsp/irq.h
+++ b/bsps/powerpc/motorola_powerpc/include/bsp/irq.h
@@ -133,7 +133,7 @@ extern "C" {
#define BSP_PCI_ISA_BRIDGE_IRQ (BSP_PCI_IRQ0)
#endif
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
#define BSP_DEC21143_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 1)
#define BSP_PMC_PCMIP_TYPE1_SLOT0_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 2)
#define BSP_PCMIP_TYPE1_SLOT1_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 3)
diff --git a/bsps/powerpc/motorola_powerpc/start/bspreset.c b/bsps/powerpc/motorola_powerpc/start/bspreset.c
index 0931badae4..d0af42284f 100644
--- a/bsps/powerpc/motorola_powerpc/start/bspreset.c
+++ b/bsps/powerpc/motorola_powerpc/start/bspreset.c
@@ -16,7 +16,7 @@ void bsp_reset(void)
CPU_print_stack();
/* shutdown and reboot */
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
*(unsigned char*)0xffe00000 |= 0x80;
#else
/* Memory-mapped Port 92 PIB device access
diff --git a/bsps/powerpc/motorola_powerpc/start/bspstart.c b/bsps/powerpc/motorola_powerpc/start/bspstart.c
index a781297565..894cf9d73d 100644
--- a/bsps/powerpc/motorola_powerpc/start/bspstart.c
+++ b/bsps/powerpc/motorola_powerpc/start/bspstart.c
@@ -109,7 +109,7 @@ char *save_boot_params(
return loaderParam;
}
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
unsigned int EUMBBAR;
/*
@@ -130,7 +130,7 @@ uint32_t _CPU_Counter_frequency(void)
static void bsp_early( void )
{
-#if !defined(mvme2100)
+#if !defined(mot_ppc_mvme2100)
unsigned l2cr;
#endif
prep_t boardManufacturer;
@@ -149,7 +149,7 @@ static void bsp_early( void )
* Init MMU block address translation to enable hardware access
*/
-#if !defined(mvme2100)
+#if !defined(mot_ppc_mvme2100)
/*
* PC legacy IO space used for inb/outb and all PC compatible hardware
*/
@@ -173,7 +173,7 @@ static void bsp_early( void )
setdbat(3, 0xb0000000, 0xb0000000, 0x10000000, IO_PAGE);
#endif
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
/* Need 0xfec00000 mapped for this */
EUMBBAR = get_eumbbar();
#endif
@@ -200,7 +200,7 @@ static void bsp_early( void )
#endif
-#if !defined(mvme2100)
+#if !defined(mot_ppc_mvme2100)
/*
* Enable L2 Cache. Note that the set_L2CR(L2CR) codes checks for
* relevant CPU type (mpc750)...
diff --git a/bsps/powerpc/motorola_powerpc/start/motorola.c b/bsps/powerpc/motorola_powerpc/start/motorola.c
index 25b1d3aa3c..58c711f07b 100644
--- a/bsps/powerpc/motorola_powerpc/start/motorola.c
+++ b/bsps/powerpc/motorola_powerpc/start/motorola.c
@@ -368,7 +368,7 @@ motorolaBoard getMotorolaBoard(void)
*
* NOTE: Every path must set currentBoard.
*/
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
currentBoard = (motorolaBoard) MVME_2100;
#else
unsigned char cpu_type;
diff --git a/bsps/powerpc/shared/irq/irq_init.c b/bsps/powerpc/shared/irq/irq_init.c
index 233c659b85..ecbff9bb19 100644
--- a/bsps/powerpc/shared/irq/irq_init.c
+++ b/bsps/powerpc/shared/irq/irq_init.c
@@ -98,7 +98,7 @@ static rtems_irq_prio irqPrioTable[BSP_IRQ_NUMBER]={
};
#if BSP_PCI_IRQ_NUMBER > 0
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
static unsigned char mvme2100_openpic_initpolarities[16] = {
0, /* Not used - should be disabled */
0, /* DEC21143 Controller */
@@ -276,7 +276,7 @@ loop_exit:
*/
void BSP_rtems_irq_mng_init(unsigned cpuId)
{
-#if BSP_ISA_IRQ_NUMBER > 0 && !defined(mvme2100)
+#if BSP_ISA_IRQ_NUMBER > 0 && !defined(mot_ppc_mvme2100)
int known_cpi_isa_bridge = 0;
#endif
int i;
@@ -285,7 +285,7 @@ void BSP_rtems_irq_mng_init(unsigned cpuId)
/*
* First initialize the Interrupt management hardware
*/
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
#ifdef TRACE_IRQ_INIT
printk("Going to initialize EPIC interrupt controller (openpic compliant)\n");
#endif
diff --git a/bsps/powerpc/shared/pci/detect_raven_bridge.c b/bsps/powerpc/shared/pci/detect_raven_bridge.c
index 0a1c04a2e2..a3f03e0acd 100644
--- a/bsps/powerpc/shared/pci/detect_raven_bridge.c
+++ b/bsps/powerpc/shared/pci/detect_raven_bridge.c
@@ -30,7 +30,7 @@
extern const pci_config_access_functions pci_direct_functions;
extern const pci_config_access_functions pci_indirect_functions;
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
/* FIXME - this should really be in a separate file - the 2100 doesn't
* have a raven chip so there is no point having 2100 code here
*/
diff --git a/bsps/powerpc/shared/rtc/todcfg.c b/bsps/powerpc/shared/rtc/todcfg.c
index 17ef18d5b5..95d75216a2 100644
--- a/bsps/powerpc/shared/rtc/todcfg.c
+++ b/bsps/powerpc/shared/rtc/todcfg.c
@@ -11,7 +11,7 @@
#include <libchip/m48t08.h>
/* Forward function declaration */
-#if !defined(mvme2100)
+#if !defined(mot_ppc_mvme2100)
uint32_t mvmertc_get_register( uintptr_t, uint8_t );
void mvmertc_set_register( uintptr_t, uint8_t, uint32_t );
#endif
@@ -24,7 +24,7 @@ rtc_tbl RTC_Table[] = {
&m48t08_fns, /* pDeviceFns */
rtc_probe, /* deviceProbe */
NULL, /* pDeviceParams */
-#if defined(mvme2100)
+#if defined(mot_ppc_mvme2100)
0xFFE81ff8, /* ulCtrlPort1 */
0x00, /* ulDataPort */
m48t08_get_register, /* getRegister */
@@ -44,7 +44,7 @@ rtc_tbl RTC_Table[] = {
size_t RTC_Count = NUM_RTCS;
-#if !defined(mvme2100)
+#if !defined(mot_ppc_mvme2100)
#include <rtems/bspIo.h>
void mvmertc_set_register(
uintptr_t base,