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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2019-08-30 08:14:59 +0200 |
---|---|---|
committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2019-09-06 08:09:34 +0200 |
commit | c331bdc7776b45f2f684565180df66ccbf5928f1 (patch) | |
tree | 16220da1c4b8156eba816a0457b8c055cd93f692 /bsps/shared | |
parent | Add a parallel bootstrap command. (diff) | |
download | rtems-c331bdc7776b45f2f684565180df66ccbf5928f1.tar.bz2 |
record: Allow tracing of ISR disable/enable
Directly use the CPU port API in boot_card() to allow tracing of the
higher level interrupt disable/enable routines, e.g.
_ISR_Local_disable() and _ISR_Local_enable(). Currently, there is no
configuration option to enable this. Below is a patch. It may be used
to investigate some nasty low level bugs in the system.
Update #3665.
diff --git a/cpukit/include/rtems/score/isrlevel.h b/cpukit/include/rtems/score/isrlevel.h
index c42451d010..46d361ddc2 100644
--- a/cpukit/include/rtems/score/isrlevel.h
+++ b/cpukit/include/rtems/score/isrlevel.h
@@ -40,6 +40,10 @@ extern "C" {
*/
typedef uint32_t ISR_Level;
+uint32_t rtems_record_interrupt_disable( void );
+
+void rtems_record_interrupt_enable( uint32_t level );
+
/**
* @brief Disables interrupts on this processor.
*
@@ -56,8 +60,7 @@ typedef uint32_t ISR_Level;
*/
#define _ISR_Local_disable( _level ) \
do { \
- _CPU_ISR_Disable( _level ); \
- RTEMS_COMPILER_MEMORY_BARRIER(); \
+ _level = rtems_record_interrupt_disable(); \
} while (0)
/**
@@ -72,10 +75,7 @@ typedef uint32_t ISR_Level;
* _ISR_Local_disable().
*/
#define _ISR_Local_enable( _level ) \
- do { \
- RTEMS_COMPILER_MEMORY_BARRIER(); \
- _CPU_ISR_Enable( _level ); \
- } while (0)
+ rtems_record_interrupt_enable( _level )
/**
* @brief Temporarily enables interrupts on this processor.
@@ -98,9 +98,8 @@ typedef uint32_t ISR_Level;
*/
#define _ISR_Local_flash( _level ) \
do { \
- RTEMS_COMPILER_MEMORY_BARRIER(); \
- _CPU_ISR_Flash( _level ); \
- RTEMS_COMPILER_MEMORY_BARRIER(); \
+ rtems_record_interrupt_enable( _level ); \
+ _level = rtems_record_interrupt_disable(); \
} while (0)
/
Diffstat (limited to '')
-rw-r--r-- | bsps/shared/start/bootcard.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/bsps/shared/start/bootcard.c b/bsps/shared/start/bootcard.c index 542785bd83..a6ad1953c0 100644 --- a/bsps/shared/start/bootcard.c +++ b/bsps/shared/start/bootcard.c @@ -46,13 +46,15 @@ void boot_card( const char *cmdline ) { - rtems_interrupt_level bsp_isr_level; + ISR_Level bsp_isr_level; /* - * Make sure interrupts are disabled. + * Make sure interrupts are disabled. Directly use the CPU port API to allow + * tracing of the higher level interrupt disable/enable routines, e.g. + * _ISR_Local_disable() and _ISR_Local_enable(). */ + _CPU_ISR_Disable( bsp_isr_level ); (void) bsp_isr_level; - rtems_interrupt_local_disable( bsp_isr_level ); bsp_boot_cmdline = cmdline; |