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| author | Hesham Almatary <Hesham.Almatary@cl.cam.ac.uk> | 2018-05-28 12:14:12 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-06-27 08:58:17 +0200 |
| commit | 92388f6941b75a43ae9f3db27402fc270536625c (patch) | |
| tree | 0a92b6085c7e5d07d6cc6c3ef118baf8f501df28 /bsps/riscv/riscv_generic/config/rv64imafdc.cfg | |
| parent | bsp/riscv_generic: New linker command file (diff) | |
| download | rtems-92388f6941b75a43ae9f3db27402fc270536625c.tar.bz2 | |
bsps/riscv_generic: Rename and add variants
Add BSP variants to match supported RISC-V ISA variants (multilibs).
Diffstat (limited to '')
| -rw-r--r-- | bsps/riscv/riscv_generic/config/rv64imafdc.cfg | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/bsps/riscv/riscv_generic/config/rv64imafdc.cfg b/bsps/riscv/riscv_generic/config/rv64imafdc.cfg new file mode 100644 index 0000000000..b1676670e7 --- /dev/null +++ b/bsps/riscv/riscv_generic/config/rv64imafdc.cfg @@ -0,0 +1,7 @@ +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = riscv + +CPU_CFLAGS = -march=rv64imafdc -mabi=lp64d + +CFLAGS_OPTIMIZE_V ?= -O0 -g |