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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2020-04-07 08:26:00 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2020-07-05 12:56:01 +0200 |
| commit | 9b3b33d91a4615175852aee5d2f44df0a9fd1e87 (patch) | |
| tree | cfe3efe642a7fa8a0e6350de29c0bd7f952903f3 /bsps/powerpc/qoriq | |
| parent | bsp/qoriq: Fix tlbwe sequence (diff) | |
| download | rtems-9b3b33d91a4615175852aee5d2f44df0a9fd1e87.tar.bz2 | |
bsps/powerpc: Fix inline assembly
GCC 10 no longer passes -many to the assembler. This enables more
checks in the assembler.
Diffstat (limited to 'bsps/powerpc/qoriq')
| -rw-r--r-- | bsps/powerpc/qoriq/start/bspstart.c | 5 | ||||
| -rw-r--r-- | bsps/powerpc/qoriq/start/mmu.c | 7 |
2 files changed, 6 insertions, 6 deletions
diff --git a/bsps/powerpc/qoriq/start/bspstart.c b/bsps/powerpc/qoriq/start/bspstart.c index 3c75ecf020..5abd651a27 100644 --- a/bsps/powerpc/qoriq/start/bspstart.c +++ b/bsps/powerpc/qoriq/start/bspstart.c @@ -93,9 +93,6 @@ static void initialize_frequency_parameters(void) #endif } -#define MTIVPR(base) \ - __asm__ volatile ("mtivpr %0" : : "r" (base)) - #ifdef __powerpc64__ #define VECTOR_TABLE_ENTRY_SIZE 32 #else @@ -117,7 +114,7 @@ void qoriq_initialize_exceptions(void *interrupt_stack_begin) ); addr = (uintptr_t) bsp_exc_vector_base; - MTIVPR(addr); + ppc_mtivpr((void *) addr); MTIVOR(BOOKE_IVOR0, addr); MTIVOR(BOOKE_IVOR1, addr); MTIVOR(BOOKE_IVOR2, addr); diff --git a/bsps/powerpc/qoriq/start/mmu.c b/bsps/powerpc/qoriq/start/mmu.c index b912613cc4..558c49618a 100644 --- a/bsps/powerpc/qoriq/start/mmu.c +++ b/bsps/powerpc/qoriq/start/mmu.c @@ -350,7 +350,7 @@ void qoriq_mmu_change_perm(uint32_t test, uint32_t set, uint32_t clear) uint32_t mas1 = 0; PPC_SET_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS0, mas0); - asm volatile ("tlbre"); + ppc_tlbre(); mas1 = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS1); if ((mas1 & FSL_EIS_MAS1_V) != 0) { @@ -361,7 +361,10 @@ void qoriq_mmu_change_perm(uint32_t test, uint32_t set, uint32_t clear) mas3 &= ~(clear & mask); mas3 |= set & mask; PPC_SET_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS3, mas3); - asm volatile ("msync; isync; tlbwe; isync" : : : "memory"); + ppc_msync(); + ppc_synchronize_instructions(); + ppc_tlbwe(); + ppc_synchronize_instructions(); } } } |