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authorChris Johns <chrisj@rtems.org>2023-04-05 12:58:53 +1000
committerChris Johns <chrisj@rtems.org>2023-04-06 08:41:16 +1000
commit2138ce43c5755cf6a8215ff1dd2f9877d8e9b7f2 (patch)
treea83dbc80da65cb5998dfadf50b0a94b928cba28a /bsps/powerpc/motorola_powerpc/include/bsp.h
parentcpukit/libdl: Resolve size mismatch warnings (diff)
downloadrtems-2138ce43c5755cf6a8215ff1dd2f9877d8e9b7f2.tar.bz2
bsps/mvme2700: Add MVME2700 BSP
Diffstat (limited to '')
-rw-r--r--bsps/powerpc/motorola_powerpc/include/bsp.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/bsps/powerpc/motorola_powerpc/include/bsp.h b/bsps/powerpc/motorola_powerpc/include/bsp.h
index 1c35d8e1b7..db0995fa5c 100644
--- a/bsps/powerpc/motorola_powerpc/include/bsp.h
+++ b/bsps/powerpc/motorola_powerpc/include/bsp.h
@@ -50,8 +50,8 @@ extern "C" {
* _VME_A32_WIN0_ON_VME: VME address of that same window
*
* AFAIK, only PreP boards have a non-zero PCI_MEM_BASE (i.e., an offset between
- * CPU and PCI addresses). The mvme2300 'ppcbug' firmware configures the PCI
- * bus using PCI base addresses! I.e., drivers need to add PCI_MEM_BASE to
+ * CPU and PCI addresses). The mvme2307/mvme2700 'ppcbug' firmware configures the
+ * PCI bus using PCI base addresses! I.e., drivers need to add PCI_MEM_BASE to
* the base address read from PCI config.space in order to translate that
* into a CPU address.
*
@@ -169,7 +169,7 @@ extern "C" {
#define BSP_VGA_IOBASE ((_IO_BASE)+0x3c0)
#endif
-#if defined(mvme2300)
+#if defined(mvme2300) || defined(mvme2307) || defined(mvme2700)
#define MVME_HAS_DEC21140
#endif
#endif
@@ -271,7 +271,7 @@ extern int BSP_connect_clock_handler (void);
* It returns and clears the error bits of the PCI status register.
* MCP support is disabled because:
* a) the 2100 has no raven chip
- * b) the raven (2300) would raise machine check interrupts
+ * b) the raven (2300, 2307, 2700) would raise machine check interrupts
* on PCI config space access to empty slots.
*/
extern unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet);