diff options
author | Christian Mauderer <christian.mauderer@embedded-brains.de> | 2023-05-04 14:50:28 +0200 |
---|---|---|
committer | Christian Mauderer <christian.mauderer@embedded-brains.de> | 2023-05-22 09:45:42 +0200 |
commit | d941dd0dad991bea4a435e63e84f35aa98ccfcff (patch) | |
tree | d0d3985233ac1c05eea1ce2356c3672df96c6574 /bsps/arm | |
parent | bsps/shared: Fix header for fsl-edma (diff) | |
download | rtems-d941dd0dad991bea4a435e63e84f35aa98ccfcff.tar.bz2 |
bsps/imxrt: Remove unmaintained defines
The defines for the different clock frequencies in the
fsl_clock_config.h do not represent the clock frequencies that have been
set up in the registers. Remove them to avoid someone trusting in
correct values.
Diffstat (limited to '')
-rw-r--r-- | bsps/arm/imxrt/include/fsl_clock_config.h | 58 | ||||
-rw-r--r-- | bsps/arm/imxrt/nxp/boards/evkbimxrt1050/clock_config.c | 2 |
2 files changed, 4 insertions, 56 deletions
diff --git a/bsps/arm/imxrt/include/fsl_clock_config.h b/bsps/arm/imxrt/include/fsl_clock_config.h index f213ac7e23..5c09daf59d 100644 --- a/bsps/arm/imxrt/include/fsl_clock_config.h +++ b/bsps/arm/imxrt/include/fsl_clock_config.h @@ -8,6 +8,7 @@ #ifndef _CLOCK_CONFIG_H_ #define _CLOCK_CONFIG_H_ +#include <bspopts.h> #include "fsl_common.h" /******************************************************************************* @@ -34,61 +35,7 @@ void BOARD_InitBootClocks(void); } #endif /* __cplusplus*/ -/******************************************************************************* - ********************** Configuration BOARD_BootClockRUN *********************** - ******************************************************************************/ -/******************************************************************************* - * Definitions for BOARD_BootClockRUN configuration - ******************************************************************************/ -#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 600000000U /*!< Core clock frequency: 600000000Hz */ - -/* Clock outputs (values are in Hz): */ -#define BOARD_BOOTCLOCKRUN_AHB_CLK_ROOT 600000000UL -#define BOARD_BOOTCLOCKRUN_CAN_CLK_ROOT 40000000UL -#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT 32768UL -#define BOARD_BOOTCLOCKRUN_CLKO1_CLK 0UL -#define BOARD_BOOTCLOCKRUN_CLKO2_CLK 0UL -#define BOARD_BOOTCLOCKRUN_CLK_1M 1000000UL -#define BOARD_BOOTCLOCKRUN_CLK_24M 24000000UL -#define BOARD_BOOTCLOCKRUN_CSI_CLK_ROOT 12000000UL -#define BOARD_BOOTCLOCKRUN_ENET1_TX_CLK 2400000UL -#define BOARD_BOOTCLOCKRUN_ENET_125M_CLK 2400000UL -#define BOARD_BOOTCLOCKRUN_ENET_25M_REF_CLK 1200000UL -#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT 30000000UL -#define BOARD_BOOTCLOCKRUN_FLEXIO2_CLK_ROOT 30000000UL -#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT 160000000UL -#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ 75000000UL -#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ 75000000UL -#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT 150000000UL -#define BOARD_BOOTCLOCKRUN_LCDIF_CLK_ROOT 9642857UL -#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT 60000000UL -#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT 105600000UL -#define BOARD_BOOTCLOCKRUN_LVDS1_CLK 1200000000UL -#define BOARD_BOOTCLOCKRUN_MQS_MCLK 63529411UL -#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT 75000000UL -#define BOARD_BOOTCLOCKRUN_PLL7_MAIN_CLK 24000000UL -#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT 63529411UL -#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1 63529411UL -#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2 63529411UL -#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3 30000000UL -#define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT 63529411UL -#define BOARD_BOOTCLOCKRUN_SAI2_MCLK1 63529411UL -#define BOARD_BOOTCLOCKRUN_SAI2_MCLK2 0UL -#define BOARD_BOOTCLOCKRUN_SAI2_MCLK3 30000000UL -#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT 63529411UL -#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1 63529411UL -#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2 0UL -#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3 30000000UL -#define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT 75000000UL -#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL -#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL -#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL -#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL -#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL -#define BOARD_BOOTCLOCKRUN_USBPHY2_CLK 0UL -#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 198000000UL -#define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT 198000000UL - +#if IMXRT_IS_MIMXRT10xx /*! @brief Arm PLL set for BOARD_BootClockRUN configuration. */ extern const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN; @@ -98,6 +45,7 @@ extern const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN; /*! @brief Sys PLL for BOARD_BootClockRUN configuration. */ extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN; +#endif /******************************************************************************* * API for BOARD_BootClockRUN configuration diff --git a/bsps/arm/imxrt/nxp/boards/evkbimxrt1050/clock_config.c b/bsps/arm/imxrt/nxp/boards/evkbimxrt1050/clock_config.c index 4ab5216ee1..8f6980d0ef 100644 --- a/bsps/arm/imxrt/nxp/boards/evkbimxrt1050/clock_config.c +++ b/bsps/arm/imxrt/nxp/boards/evkbimxrt1050/clock_config.c @@ -487,5 +487,5 @@ void BOARD_BootClockRUN(void) /* Set GPT2 High frequency reference clock source. */ IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK; /* Set SystemCoreClock variable. */ - SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK; + SystemCoreClock = 600000000U; } |