diff options
| author | Karel Gardas <karel@functional.vision> | 2022-04-01 18:14:18 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-04-05 09:56:06 +0200 |
| commit | 074cb1c61d70c91d51bc3ff044c11defeda3efbc (patch) | |
| tree | 04a0bdad81e7bf69ac647aa80345f4168bc750b4 /bsps/arm | |
| parent | bsp/stm32h7: configure AHB clock divider for STM32H7B3xxQ (e.g. STM32H7B3I-DK... (diff) | |
| download | rtems-074cb1c61d70c91d51bc3ff044c11defeda3efbc.tar.bz2 | |
bsp/stm32h7: configure oscillator for STM32H7B3xxQ (e.g. STM32H7B3I-DK BSP)
Diffstat (limited to 'bsps/arm')
| -rw-r--r-- | bsps/arm/stm32h7/start/stm32h7-config-osc.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/bsps/arm/stm32h7/start/stm32h7-config-osc.c b/bsps/arm/stm32h7/start/stm32h7-config-osc.c index b639c7ca36..f790201e5a 100644 --- a/bsps/arm/stm32h7/start/stm32h7-config-osc.c +++ b/bsps/arm/stm32h7/start/stm32h7-config-osc.c @@ -32,6 +32,22 @@ #include <stm32h7/hal.h> const RCC_OscInitTypeDef stm32h7_config_oscillator = { +#ifdef STM32H7B3xxQ + .OscillatorType = RCC_OSCILLATORTYPE_HSE, + .HSEState = RCC_HSE_ON, + .HSIState = RCC_HSI_OFF, + .CSIState = RCC_CSI_OFF, + .PLL.PLLState = RCC_PLL_ON, + .PLL.PLLSource = RCC_PLLSOURCE_HSE, + .PLL.PLLM = 12, + .PLL.PLLN = 280, + .PLL.PLLFRACN = 0, + .PLL.PLLP = 2, + .PLL.PLLR = 2, + .PLL.PLLQ = 2, + .PLL.PLLVCOSEL = RCC_PLL1VCOWIDE, + .PLL.PLLRGE = RCC_PLL1VCIRANGE_1, +#else .OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_HSI48, .HSEState = RCC_HSE_ON, @@ -49,4 +65,5 @@ const RCC_OscInitTypeDef stm32h7_config_oscillator = { .PLL.PLLRGE = RCC_PLL1VCIRANGE_2, .PLL.PLLVCOSEL = RCC_PLL1VCOWIDE, .PLL.PLLFRACN = 0 +#endif }; |