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authorJeff Kubascik <jeff.kubascik@dornerworks.com>2019-04-10 19:38:55 -0400
committerSebastian Huber <sebastian.huber@embedded-brains.de>2019-04-11 07:29:10 +0200
commit77f9a1be478b6b7fe265bb5db6c97fdf1670dc31 (patch)
tree46c0ec83d33805f241f50ec68649b013f6dbcdf5 /bsps/arm/xilinx-zynqmp/start/bspreset.c
parentbsp/xilinx-zynqmp: Stub out Xilinx MPSoC BSP (diff)
downloadrtems-77f9a1be478b6b7fe265bb5db6c97fdf1670dc31.tar.bz2
bsp/xilinx-zynqmp: Implement Ultra96 target
Modifications to get xilinx-zynqmp BSP working on an Ultra96 board. Update #3682.
Diffstat (limited to '')
-rw-r--r--bsps/arm/xilinx-zynqmp/start/bspreset.c15
1 files changed, 7 insertions, 8 deletions
diff --git a/bsps/arm/xilinx-zynqmp/start/bspreset.c b/bsps/arm/xilinx-zynqmp/start/bspreset.c
index e0c81ca2ef..14f7d32436 100644
--- a/bsps/arm/xilinx-zynqmp/start/bspreset.c
+++ b/bsps/arm/xilinx-zynqmp/start/bspreset.c
@@ -3,6 +3,11 @@
*
* Copyright (C) 2013 embedded brains GmbH
*
+ * Copyright (C) 2019 DornerWorks
+ *
+ * Written by Jeff Kubascik <jeff.kubascik@dornerworks.com>
+ * and Josh Whitehead <josh.whitehead@dornerworks.com>
+ *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
@@ -26,18 +31,12 @@
*/
#include <bsp.h>
-#include <bsp/bootcard.h>
-#include <bsp/zynq-uart.h>
void bsp_reset(void)
{
- volatile uint32_t *slcr_unlock = (volatile uint32_t *) 0xf8000008;
- volatile uint32_t *pss_rst_ctrl = (volatile uint32_t *) 0xf8000200;
-
- zynq_uart_reset_tx_flush(&zynq_uart_instances[BSP_CONSOLE_MINOR]);
+ zynqmp_debug_console_flush();
while (true) {
- *slcr_unlock = 0xdf0d;
- *pss_rst_ctrl = 0x1;
+ /* Wait */
}
}