summaryrefslogtreecommitdiffstats
path: root/bsps/arm/shared/start/start.S
diff options
context:
space:
mode:
authorSebastian Huber <sebastian.huber@embedded-brains.de>2020-12-21 07:29:41 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2020-12-23 09:19:28 +0100
commit76a1a5378031e56d29d16c713aee73c6747c3e61 (patch)
tree8918ba94751b80d57d5dd07807d571f2580908bb /bsps/arm/shared/start/start.S
parentbsps/arm: Set VBAR in start.S (diff)
downloadrtems-76a1a5378031e56d29d16c713aee73c6747c3e61.tar.bz2
bsps/arm: Invalidate branch predictors earlier
Make sure the branch predictors are invalidated before the first branch is executed. Update #4202.
Diffstat (limited to 'bsps/arm/shared/start/start.S')
-rw-r--r--bsps/arm/shared/start/start.S11
1 files changed, 11 insertions, 0 deletions
diff --git a/bsps/arm/shared/start/start.S b/bsps/arm/shared/start/start.S
index 9ebc2818e5..f4880dfcf0 100644
--- a/bsps/arm/shared/start/start.S
+++ b/bsps/arm/shared/start/start.S
@@ -181,6 +181,17 @@ _start:
mov r13, #0
#endif
+#if __ARM_ARCH >= 7
+ /*
+ * Write to BPIALL (Branch Predictor Invalidate All) to invalidate all
+ * branch predictors. There is no need to use BPIALLIS (Branch
+ * Predictor Invalidate All, Inner Shareable) since this code is
+ * executed on all processors used by RTEMS.
+ */
+ mov r0, #0
+ mcr p15, 0, r0, c7, c5, 6
+#endif
+
#ifdef RTEMS_SMP
/* Read MPIDR and get current processor index */
mrc p15, 0, r7, c0, c0, 5