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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2019-05-09 09:16:20 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2019-05-09 09:55:26 +0200 |
| commit | 6cad529ccb160ee6cc5991e0fb52c5a8ce2f027f (patch) | |
| tree | 4c13ca9a93263b86ee5cec27e5e98f575915f20b /bsps/arm/lpc24xx | |
| parent | bsp/lpc24xx: Fix LPC24XX_EMC_MT48LC4M16A2 MPU cfg (diff) | |
| download | rtems-6cad529ccb160ee6cc5991e0fb52c5a8ce2f027f.tar.bz2 | |
bsp/lpc24xx: Add SDRAM mode settings comment
Diffstat (limited to 'bsps/arm/lpc24xx')
| -rw-r--r-- | bsps/arm/lpc24xx/start/start-config-emc-dynamic.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/bsps/arm/lpc24xx/start/start-config-emc-dynamic.c b/bsps/arm/lpc24xx/start/start-config-emc-dynamic.c index 801b33f6ae..fe25af26b9 100644 --- a/bsps/arm/lpc24xx/start/start-config-emc-dynamic.c +++ b/bsps/arm/lpc24xx/start/start-config-emc-dynamic.c @@ -232,6 +232,15 @@ BSP_START_DATA_SECTION const lpc24xx_emc_dynamic_config #endif }; +/* + * Mode shift is determined for RBC by: + * + * bus width in bits / 16 + bank bits + column bits + * + * Mode shift is determined for BRC by: + * + * bus width in bits / 16 + column bits + */ BSP_START_DATA_SECTION const lpc24xx_emc_dynamic_chip_config lpc24xx_start_config_emc_dynamic_chip [] = { #if defined(LPC24XX_EMC_MT48LC4M16A2) @@ -240,7 +249,7 @@ BSP_START_DATA_SECTION const lpc24xx_emc_dynamic_chip_config /* * Use SDRAM, 0 0 001 01 address mapping, disabled buffer, unprotected - * writes. 4 banks, 12 row lines, 8 column lines. + * writes. 4 banks, 12 row lines, 8 column lines, RBC. */ .config = 0x280, |