summaryrefslogtreecommitdiffstats
path: root/bsps/arm/include/dev/irq/arm-gic-arch.h
diff options
context:
space:
mode:
authorSebastian Huber <sebastian.huber@embedded-brains.de>2024-04-08 14:49:21 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2024-04-16 07:26:35 +0200
commit899f92f7b891f51c5ff1d62bb5c3f42bf73f23a0 (patch)
tree069ba5ea3030e025dd17afbb190536a4b5e0136a /bsps/arm/include/dev/irq/arm-gic-arch.h
parentsmptests/smpipi01: Fix sporadic test failure (diff)
downloadrtems-899f92f7b891f51c5ff1d62bb5c3f42bf73f23a0.tar.bz2
bsps/arm: Improve GICv2 support
In addtion to 1023, the GICC_IAR register may return 1022 as a special value. Simply check for a valid interrupt vector for the dispatching. Check the GICC_IAR again after the dispatch to quickly process a next interrupt without having to go through the interrupt prologue and epiloge.
Diffstat (limited to '')
-rw-r--r--bsps/arm/include/dev/irq/arm-gic-arch.h10
1 files changed, 6 insertions, 4 deletions
diff --git a/bsps/arm/include/dev/irq/arm-gic-arch.h b/bsps/arm/include/dev/irq/arm-gic-arch.h
index c9931be61a..f2ea76f22f 100644
--- a/bsps/arm/include/dev/irq/arm-gic-arch.h
+++ b/bsps/arm/include/dev/irq/arm-gic-arch.h
@@ -44,12 +44,14 @@
extern "C" {
#endif
-static inline void arm_interrupt_handler_dispatch(rtems_vector_number vector)
+static inline uint32_t arm_interrupt_enable_interrupts(void)
{
- uint32_t psr = _ARMV4_Status_irq_enable();
- bsp_interrupt_handler_dispatch(vector);
+ return _ARMV4_Status_irq_enable();
+}
- _ARMV4_Status_restore(psr);
+static inline void arm_interrupt_restore_interrupts(uint32_t status)
+{
+ _ARMV4_Status_restore(status);
}
static inline void arm_interrupt_facility_set_exception_handler(void)