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authorChristian Mauderer <christian.mauderer@embedded-brains.de>2021-02-04 14:27:50 +0100
committerChristian Mauderer <oss@c-mauderer.de>2021-03-21 12:30:29 +0100
commit65ab1cda10f26935cad2ba01426077079cd96af3 (patch)
tree810cb7ce137a3afc235ce6a5ebe8c5d8126a9b8c /bsps/arm/imxrt/nxp
parent53bd5e3246a02eff102c21d7b7a10629c5c23ff6 (diff)
downloadrtems-65ab1cda10f26935cad2ba01426077079cd96af3.tar.bz2
bsps/arm/imxrt: Add FDT and FDT helper for QTMR
Makes it simpler to access the QTMR in an application via a FDT name or link in an application specific FDT entry.
Diffstat (limited to 'bsps/arm/imxrt/nxp')
-rw-r--r--bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_qtmr.c40
1 files changed, 40 insertions, 0 deletions
diff --git a/bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_qtmr.c b/bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_qtmr.c
index 44b7867441..f96e5504be 100644
--- a/bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_qtmr.c
+++ b/bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_qtmr.c
@@ -6,6 +6,11 @@
*/
#include "fsl_qtmr.h"
+#ifdef __rtems__
+#include <bsp.h>
+#include <bsp/irq.h>
+#include <libfdt.h>
+#endif /* __rtems__ */
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
@@ -56,6 +61,41 @@ static uint32_t QTMR_GetInstance(TMR_Type *base)
return instance;
}
+#ifdef __rtems__
+TMR_Type *QTMR_get_regs_from_fdt(const void *fdt, int node)
+{
+ int rv;
+ TMR_Type *regs;
+
+ rv = fdt_node_check_compatible(fdt, node, "nxp,imxrt-qtimer");
+ if (rv != 0) {
+ return NULL;
+ }
+ regs = imx_get_reg_of_node(fdt, node);
+ return regs;
+}
+
+rtems_vector_number QTMR_get_IRQ_from_fdt(const void *fdt, int node)
+{
+ int rv;
+ rtems_vector_number irq;
+
+ rv = fdt_node_check_compatible(fdt, node, "nxp,imxrt-qtimer");
+ if (rv != 0) {
+ return BSP_INTERRUPT_VECTOR_INVALID;
+ }
+ irq = imx_get_irq_of_node(fdt, node, 0);
+ return irq;
+}
+
+uint32_t QTMR_get_src_clk(TMR_Type *base)
+{
+ (void) base;
+
+ return CLOCK_GetFreq(kCLOCK_IpgClk);
+}
+
+#endif /* __rtems__ */
/*!
* brief Ungates the Quad Timer clock and configures the peripheral for basic operation.
*