bsp/imxrt: Adapt imported files

Update #4180

5 files changed, 45 insertions, 26 deletions

diff --git a/bsps/arm/imxrt/include/fsl_device_registers.h b/bsps/arm/imxrt/include/fsl_device_registers.h
index 54caf43ca6..00c3fc7036 100644
--- a/bsps/arm/imxrt/include/fsl_device_registers.h
+++ b/bsps/arm/imxrt/include/fsl_device_registers.h
@@ -1,36 +1,41 @@
-/*
- * Copyright 2014-2016 Freescale Semiconductor, Inc.
- * Copyright 2016-2018 NXP
- * All rights reserved.
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
  *
- * SPDX-License-Identifier: BSD-3-Clause
+ * @ingroup RTEMSBSPsARMimxrt
  *
+ * @brief Helper file for including registers for SDK drivers.
  */
 
-#ifndef __FSL_DEVICE_REGISTERS_H__
-#define __FSL_DEVICE_REGISTERS_H__
-
 /*
- * Include the cpu specific register header files.
+ * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
  *
- * The CPU macro should be declared in the project or makefile.
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
  */
-#if (defined(CPU_MIMXRT1052CVJ5B) || defined(CPU_MIMXRT1052CVL5B) || defined(CPU_MIMXRT1052DVJ6B) || \
-    defined(CPU_MIMXRT1052DVL6B))
-
-#define MIMXRT1052_SERIES
-
-/* CMSIS-style register definitions */
-#include "MIMXRT1052.h"
-/* CPU specific feature definitions */
-#include "MIMXRT1052_features.h"
 
-#else
-    #error "No valid CPU defined!"
-#endif
+#ifndef FSL_DEVICE_REGISTERS_H
+#define FSL_DEVICE_REGISTERS_H
 
-#endif /* __FSL_DEVICE_REGISTERS_H__ */
+#include <chip.h>
 
-/*******************************************************************************
- * EOF
- ******************************************************************************/
+#endif /* FSL_DEVICE_REGISTERS_H */
diff --git a/bsps/arm/imxrt/include/fsl_flexspi_nor_boot.h b/bsps/arm/imxrt/include/fsl_flexspi_nor_boot.h
index 7b256f6670..56995eca55 100644
--- a/bsps/arm/imxrt/include/fsl_flexspi_nor_boot.h
+++ b/bsps/arm/imxrt/include/fsl_flexspi_nor_boot.h
@@ -9,7 +9,9 @@
 #define __FLEXSPI_NOR_BOOT_H__
 
 #include <stdint.h>
+#ifndef __rtems__
 #include "board.h"
+#endif /* __rtems__ */
 
 /*! @name Driver version */
 /*@{*/
@@ -85,6 +87,7 @@ typedef struct _ivt_ {
 #define FLASH_BASE ((uint32_t)__FLASH_BASE)   
 #endif
 
+#ifndef __rtems__
 #if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (1 == XIP_BOOT_HEADER_DCD_ENABLE)
 #define DCD_ADDRESS dcd_data
 #else
@@ -94,6 +97,7 @@ typedef struct _ivt_ {
 #define BOOT_DATA_ADDRESS     &boot_data
 #define CSF_ADDRESS           0
 #define IVT_RSVD             (uint32_t)(0x00000000)
+#endif /* __rtems__ */
 
 /************************************* 
  *  Boot Data 
@@ -114,11 +118,13 @@ typedef struct _boot_data_ {
 #endif /* __rtems__ */
 #define PLUGIN_FLAG           (uint32_t)0
 
+#ifndef __rtems__
 /* External Variables */
 const BOOT_DATA_T boot_data;
 #if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (1 == XIP_BOOT_HEADER_DCD_ENABLE)
 extern const uint8_t dcd_data[];
 #endif
+#endif /* __rtems__ */
 
 #endif /* __FLEXSPI_NOR_BOOT_H__ */
 
diff --git a/bsps/arm/imxrt/include/evkbimxrt1050_flexspi_nor_config.h b/bsps/arm/imxrt/include/fsl_flexspi_nor_config.h
index 4a2a158f50..4a2a158f50 100644
--- a/bsps/arm/imxrt/include/evkbimxrt1050_flexspi_nor_config.h
+++ b/bsps/arm/imxrt/include/fsl_flexspi_nor_config.h
diff --git a/bsps/arm/imxrt/include/fsl_lpuart.h b/bsps/arm/imxrt/include/fsl_lpuart.h
index 6ec3534c81..fcf203dcf4 100644
--- a/bsps/arm/imxrt/include/fsl_lpuart.h
+++ b/bsps/arm/imxrt/include/fsl_lpuart.h
@@ -315,7 +315,11 @@ static inline void LPUART_SoftwareReset(LPUART_Type *base)
  * @retval kStatus_LPUART_BaudrateNotSupport Baudrate is not support in current clock source.
  * @retval kStatus_Success LPUART initialize succeed
  */
+#ifndef __rtems__
 status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t srcClock_Hz);
+#else /* __rtems__ */
+status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t srcClock_Hz, bool do_reset);
+#endif /* __rtems__ */
 
 /*!
  * @brief Deinitializes a LPUART instance.
diff --git a/bsps/arm/imxrt/include/fsl_pin_mux.h b/bsps/arm/imxrt/include/fsl_pin_mux.h
index cb2ed43025..96e518412b 100644
--- a/bsps/arm/imxrt/include/fsl_pin_mux.h
+++ b/bsps/arm/imxrt/include/fsl_pin_mux.h
@@ -13,6 +13,10 @@
 #ifndef _PIN_MUX_H_
 #define _PIN_MUX_H_
 
+#ifdef __rtems__
+#include <bsp/start.h>
+#endif /* __rtems__ */
+
 /***********************************************************************************************************************
  * Definitions
  **********************************************************************************************************************/