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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2019-06-21 06:58:19 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2019-06-21 06:58:48 +0200 |
| commit | dc581f29ab988f5af366a8c3c9038ac7956bb974 (patch) | |
| tree | 3469b357cb0a2c911f49e805c38ea2be020a4a12 /bsps/arm/atsam/start/sdram-config.c | |
| parent | psxtests: Add psxinttypes01 for <inttypes.h> methods (diff) | |
| download | rtems-dc581f29ab988f5af366a8c3c9038ac7956bb974.tar.bz2 | |
bsp/atsam: Enable configuration of SDRAMC_LPR
Diffstat (limited to '')
| -rw-r--r-- | bsps/arm/atsam/start/sdram-config.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/bsps/arm/atsam/start/sdram-config.c b/bsps/arm/atsam/start/sdram-config.c index a2f1158377..f4244e1545 100644 --- a/bsps/arm/atsam/start/sdram-config.c +++ b/bsps/arm/atsam/start/sdram-config.c @@ -38,7 +38,8 @@ const struct BOARD_Sdram_Config BOARD_Sdram_Config = { | SDRAMC_CR_TRAS(9) /* Command period (ACT to PRE) 42ns min */ | SDRAMC_CR_TXSR(15U), /* Exit self-refresh to active time 70ns Min */ .sdramc_mdr = SDRAMC_MDR_MD_SDRAM, - .sdramc_cfr1 = SDRAMC_CFR1_UNAL_SUPPORTED | SDRAMC_CFR1_TMRD(2) + .sdramc_cfr1 = SDRAMC_CFR1_UNAL_SUPPORTED | SDRAMC_CFR1_TMRD(2), + .sdramc_lpr = 0 }; #elif defined ATSAM_SDRAM_IS42S16320F_7BL @@ -71,7 +72,8 @@ const struct BOARD_Sdram_Config BOARD_Sdram_Config = { | SDRAMC_CR_TXSR(CLOCK_CYCLES_FROM_NS_MIN(67)), .sdramc_mdr = SDRAMC_MDR_MD_SDRAM, .sdramc_cfr1 = SDRAMC_CFR1_UNAL_SUPPORTED | - SDRAMC_CFR1_TMRD(CLOCK_CYCLES_FROM_NS_MIN(14)) + SDRAMC_CFR1_TMRD(CLOCK_CYCLES_FROM_NS_MIN(14)), + .sdramc_lpr = 0 }; #elif defined ATSAM_SDRAM_MT48LC16M16A2P_6A @@ -104,7 +106,8 @@ const struct BOARD_Sdram_Config BOARD_Sdram_Config = { | SDRAMC_CR_TXSR(9), .sdramc_mdr = SDRAMC_MDR_MD_SDRAM, .sdramc_cfr1 = SDRAMC_CFR1_UNAL_SUPPORTED | - SDRAMC_CFR1_TMRD(2) + SDRAMC_CFR1_TMRD(2), + .sdramc_lpr = 0 }; #elif ATSAM_MCK == 123000000 @@ -124,7 +127,8 @@ const struct BOARD_Sdram_Config BOARD_Sdram_Config = { | SDRAMC_CR_TXSR(9), .sdramc_mdr = SDRAMC_MDR_MD_SDRAM, .sdramc_cfr1 = SDRAMC_CFR1_UNAL_SUPPORTED | - SDRAMC_CFR1_TMRD(2) + SDRAMC_CFR1_TMRD(2), + .sdramc_lpr = 0 }; #else /* ATSAM_MCK unknown */ |