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author | Kinsey Moore <kinsey.moore@oarcorp.com> | 2021-05-18 14:51:46 -0500 |
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committer | Joel Sherrill <joel@rtems.org> | 2021-05-27 14:09:00 -0500 |
commit | 5fe49a0853e55dce9d81ac3241edb878216b48bd (patch) | |
tree | ca67e6bdc354313c5b0b207ade1e595f6e62d9a6 /bsps/aarch64/xilinx-zynqmp/include/bsp.h | |
parent | bsps/a53: Increase available RAM (diff) | |
download | rtems-5fe49a0853e55dce9d81ac3241edb878216b48bd.tar.bz2 |
bsps/aarch64: Add MMU driver to relax alignment
Currently, the AArch64 BSPs have a hard time running on real hardware
without building the toolchain and the bsps with -mstrict-align in
multiple places. Configuring the MMU on these chips allows for unaligned
memory accesses for non-device memory which avoids requiring strict
alignment in the toolchain and in the BSPs themselves.
In writing this driver, it was found that the synchronous exception
handling code needed to be rewritten since it relied on clearing SCTLR_EL1 to
avoid thread stack misalignments in RTEMS_DEBUG mode. This is now
avoided by exactly preserving thread mode stack and flags and the new
implementation is compatible with the draft information provided on the
mailing list covering the Exception Management API.
Diffstat (limited to '')
-rw-r--r-- | bsps/aarch64/xilinx-zynqmp/include/bsp.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/bsps/aarch64/xilinx-zynqmp/include/bsp.h b/bsps/aarch64/xilinx-zynqmp/include/bsp.h index e405cc2ed7..83f2e2f4e4 100644 --- a/bsps/aarch64/xilinx-zynqmp/include/bsp.h +++ b/bsps/aarch64/xilinx-zynqmp/include/bsp.h @@ -61,6 +61,13 @@ extern "C" { #define BSP_RESET_SMC +/** + * @brief Zynq UltraScale+ MPSoC specific set up of the MMU. + * + * Provide in the application to override the defaults in the BSP. + */ +BSP_START_TEXT_SECTION void zynqmp_setup_mmu_and_cache(void); + void zynqmp_debug_console_flush(void); #ifdef __cplusplus |