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| author | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2016-07-17 19:31:33 +0200 |
|---|---|---|
| committer | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2016-10-02 10:40:34 +0200 |
| commit | 8c5c8b27007dcc9ffa6f91e457ee73350f39f3cf (patch) | |
| tree | aaaab7ec21a6c6a8990ace1f321768469d29dc17 /COPYING | |
| parent | bsps/arm: do not disable MMU during translation table management operations. (diff) | |
| download | rtems-8c5c8b27007dcc9ffa6f91e457ee73350f39f3cf.tar.bz2 | |
arm/bsps: CP15 and basic cache support entire cache clean for more architecture variants now.
Next cache operations should work on most of cores now
rtems_cache_flush_entire_data()
rtems_cache_invalidate_entire_data()
rtems_cache_invalidate_entire_instruction()
Instruction cache invalidate works on the first level for now only.
Data cacache operations are extended to ensure flush/invalidate
on all cache levels.
The CP15 arm_cp15_data_cache_clean_all_levels() function extended
to continue through unified levels too (ctype = 4).
Updates #2782
Updates #2783
Diffstat (limited to 'COPYING')
0 files changed, 0 insertions, 0 deletions