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authorJoel Sherrill <joel.sherrill@OARcorp.com>1999-07-01 21:52:33 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>1999-07-01 21:52:33 +0000
commite2ba0af670ae854245888c69c40110c8478df2ba (patch)
treea52c6d3d93e912a32c0984bac8e5a04da134582d
parent4e556493d6da2c00c218cc270b79c08cd4e61eb1 (diff)
downloadrtems-e2ba0af670ae854245888c69c40110c8478df2ba.tar.bz2
Modified to support ELF. Before SYM() macro was not used consistently.
-rw-r--r--c/src/lib/libbsp/sparc/erc32/start/start.S10
-rw-r--r--c/src/lib/libbsp/sparc/erc32/startsis/startsis.S10
2 files changed, 10 insertions, 10 deletions
diff --git a/c/src/lib/libbsp/sparc/erc32/start/start.S b/c/src/lib/libbsp/sparc/erc32/start/start.S
index 960dd9618d..f9d4a8f293 100644
--- a/c/src/lib/libbsp/sparc/erc32/start/start.S
+++ b/c/src/lib/libbsp/sparc/erc32/start/start.S
@@ -128,14 +128,14 @@ SYM(trap_table):
*/
- .global __ERC32_MEC_Timer_Control_Mirror, _rdb_start, _CLOCK_SPEED
+ .global __ERC32_MEC_Timer_Control_Mirror, SYM(rdb_start), SYM(CLOCK_SPEED)
-_rdb_start:
+SYM(rdb_start):
__ERC32_MEC_Timer_Control_Mirror:
BAD_TRAP; BAD_TRAP; ! 7C - 7D undefined
-_CLOCK_SPEED:
+SYM(CLOCK_SPEED):
.word 0x0a, 0, 0, 0 ! 7E (10 MHz default)
@@ -196,7 +196,7 @@ _CLOCK_SPEED:
PUBLIC(hard_reset)
SYM(hard_reset):
- set _trap_table, %g1 ! Initialize TBR
+ set SYM(trap_table), %g1 ! Initialize TBR
mov %g1, %tbr
set (SYM(rdb_start)), %g6 ! End of work-space area
@@ -220,7 +220,7 @@ SYM(hard_reset):
set SYM(RAM_END), %sp ! End of work-space area
st %sp, [%g6]
- set _CLOCK_SPEED, %g6 ! Use 14 MHz in simulator
+ set SYM(CLOCK_SPEED), %g6 ! Use 14 MHz in simulator
set 14, %g1
st %g1, [%g6]
diff --git a/c/src/lib/libbsp/sparc/erc32/startsis/startsis.S b/c/src/lib/libbsp/sparc/erc32/startsis/startsis.S
index 960dd9618d..f9d4a8f293 100644
--- a/c/src/lib/libbsp/sparc/erc32/startsis/startsis.S
+++ b/c/src/lib/libbsp/sparc/erc32/startsis/startsis.S
@@ -128,14 +128,14 @@ SYM(trap_table):
*/
- .global __ERC32_MEC_Timer_Control_Mirror, _rdb_start, _CLOCK_SPEED
+ .global __ERC32_MEC_Timer_Control_Mirror, SYM(rdb_start), SYM(CLOCK_SPEED)
-_rdb_start:
+SYM(rdb_start):
__ERC32_MEC_Timer_Control_Mirror:
BAD_TRAP; BAD_TRAP; ! 7C - 7D undefined
-_CLOCK_SPEED:
+SYM(CLOCK_SPEED):
.word 0x0a, 0, 0, 0 ! 7E (10 MHz default)
@@ -196,7 +196,7 @@ _CLOCK_SPEED:
PUBLIC(hard_reset)
SYM(hard_reset):
- set _trap_table, %g1 ! Initialize TBR
+ set SYM(trap_table), %g1 ! Initialize TBR
mov %g1, %tbr
set (SYM(rdb_start)), %g6 ! End of work-space area
@@ -220,7 +220,7 @@ SYM(hard_reset):
set SYM(RAM_END), %sp ! End of work-space area
st %sp, [%g6]
- set _CLOCK_SPEED, %g6 ! Use 14 MHz in simulator
+ set SYM(CLOCK_SPEED), %g6 ! Use 14 MHz in simulator
set 14, %g1
st %g1, [%g6]