2002-04-26 Eric Norum <eric.norum@usask.ca>

	* netinet/in_cksum_i386.c: Add volatile so the more agressive
	optimization in gcc 3.1 does not reorder things.

7 files changed, 47 insertions, 16 deletions

diff --git a/c/src/exec/libnetworking/ChangeLog b/c/src/exec/libnetworking/ChangeLog
index 930651ab4c..07f46adc3c 100644
--- a/c/src/exec/libnetworking/ChangeLog
+++ b/c/src/exec/libnetworking/ChangeLog
@@ -1,3 +1,8 @@
+2002-04-26	Eric Norum <eric.norum@usask.ca>
+
+	* netinet/in_cksum_i386.c: Add volatile so the more agressive
+	optimization in gcc 3.1 does not reorder things.
+
 2002-04-18	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
 
 	* pppd/utils.c: Adapt to gcc-3.x.
diff --git a/c/src/exec/libnetworking/netinet/in_cksum_i386.c b/c/src/exec/libnetworking/netinet/in_cksum_i386.c
index 0612c5a7c4..a64bd57832 100644
--- a/c/src/exec/libnetworking/netinet/in_cksum_i386.c
+++ b/c/src/exec/libnetworking/netinet/in_cksum_i386.c
@@ -19,10 +19,14 @@
  * Thanks to gcc we don't have to guess
  * which registers contain sum & w.
  */
-#define ADD(n)	asm("addl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
-#define ADDC(n)	asm("adcl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
-#define LOAD(n)	asm volatile("movb " #n "(%1), %0" : "=r" (junk) : "r" (w))
-#define MOP	asm("adcl         $0, %0" : "=r" (sum) : "0" (sum))
+#define ADD(n)	__asm__ volatile \
+    ("addl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
+#define ADDC(n)	__asm__ volatile \
+    ("adcl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
+#define LOAD(n)	__asm__ volatile \
+     ("movb " #n "(%1), %0" : "=r" (junk) : "r" (w))
+#define MOP	__asm__ volatile \
+    ("adcl         $0, %0" : "=r" (sum) : "0" (sum))
 
 int
 in_cksum(m, len)
diff --git a/c/src/libnetworking/ChangeLog b/c/src/libnetworking/ChangeLog
index 930651ab4c..07f46adc3c 100644
--- a/c/src/libnetworking/ChangeLog
+++ b/c/src/libnetworking/ChangeLog
@@ -1,3 +1,8 @@
+2002-04-26	Eric Norum <eric.norum@usask.ca>
+
+	* netinet/in_cksum_i386.c: Add volatile so the more agressive
+	optimization in gcc 3.1 does not reorder things.
+
 2002-04-18	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
 
 	* pppd/utils.c: Adapt to gcc-3.x.
diff --git a/c/src/libnetworking/netinet/in_cksum_i386.c b/c/src/libnetworking/netinet/in_cksum_i386.c
index 0612c5a7c4..a64bd57832 100644
--- a/c/src/libnetworking/netinet/in_cksum_i386.c
+++ b/c/src/libnetworking/netinet/in_cksum_i386.c
@@ -19,10 +19,14 @@
  * Thanks to gcc we don't have to guess
  * which registers contain sum & w.
  */
-#define ADD(n)	asm("addl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
-#define ADDC(n)	asm("adcl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
-#define LOAD(n)	asm volatile("movb " #n "(%1), %0" : "=r" (junk) : "r" (w))
-#define MOP	asm("adcl         $0, %0" : "=r" (sum) : "0" (sum))
+#define ADD(n)	__asm__ volatile \
+    ("addl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
+#define ADDC(n)	__asm__ volatile \
+    ("adcl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
+#define LOAD(n)	__asm__ volatile \
+     ("movb " #n "(%1), %0" : "=r" (junk) : "r" (w))
+#define MOP	__asm__ volatile \
+    ("adcl         $0, %0" : "=r" (sum) : "0" (sum))
 
 int
 in_cksum(m, len)
diff --git a/cpukit/libnetworking/ChangeLog b/cpukit/libnetworking/ChangeLog
index 930651ab4c..07f46adc3c 100644
--- a/cpukit/libnetworking/ChangeLog
+++ b/cpukit/libnetworking/ChangeLog
@@ -1,3 +1,8 @@
+2002-04-26	Eric Norum <eric.norum@usask.ca>
+
+	* netinet/in_cksum_i386.c: Add volatile so the more agressive
+	optimization in gcc 3.1 does not reorder things.
+
 2002-04-18	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
 
 	* pppd/utils.c: Adapt to gcc-3.x.
diff --git a/cpukit/libnetworking/netinet/in_cksum_i386.c b/cpukit/libnetworking/netinet/in_cksum_i386.c
index 0612c5a7c4..a64bd57832 100644
--- a/cpukit/libnetworking/netinet/in_cksum_i386.c
+++ b/cpukit/libnetworking/netinet/in_cksum_i386.c
@@ -19,10 +19,14 @@
  * Thanks to gcc we don't have to guess
  * which registers contain sum & w.
  */
-#define ADD(n)	asm("addl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
-#define ADDC(n)	asm("adcl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
-#define LOAD(n)	asm volatile("movb " #n "(%1), %0" : "=r" (junk) : "r" (w))
-#define MOP	asm("adcl         $0, %0" : "=r" (sum) : "0" (sum))
+#define ADD(n)	__asm__ volatile \
+    ("addl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
+#define ADDC(n)	__asm__ volatile \
+    ("adcl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
+#define LOAD(n)	__asm__ volatile \
+     ("movb " #n "(%1), %0" : "=r" (junk) : "r" (w))
+#define MOP	__asm__ volatile \
+    ("adcl         $0, %0" : "=r" (sum) : "0" (sum))
 
 int
 in_cksum(m, len)
diff --git a/cpukit/libnetworking/netinet/in_cksum_i386.h b/cpukit/libnetworking/netinet/in_cksum_i386.h
index 0612c5a7c4..a64bd57832 100644
--- a/cpukit/libnetworking/netinet/in_cksum_i386.h
+++ b/cpukit/libnetworking/netinet/in_cksum_i386.h
@@ -19,10 +19,14 @@
  * Thanks to gcc we don't have to guess
  * which registers contain sum & w.
  */
-#define ADD(n)	asm("addl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
-#define ADDC(n)	asm("adcl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
-#define LOAD(n)	asm volatile("movb " #n "(%1), %0" : "=r" (junk) : "r" (w))
-#define MOP	asm("adcl         $0, %0" : "=r" (sum) : "0" (sum))
+#define ADD(n)	__asm__ volatile \
+    ("addl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
+#define ADDC(n)	__asm__ volatile \
+    ("adcl " #n "(%2), %0" : "=r" (sum) : "0" (sum), "r" (w))
+#define LOAD(n)	__asm__ volatile \
+     ("movb " #n "(%1), %0" : "=r" (junk) : "r" (w))
+#define MOP	__asm__ volatile \
+    ("adcl         $0, %0" : "=r" (sum) : "0" (sum))
 
 int
 in_cksum(m, len)