diff options
| author | Christian Mauderer <Christian.Mauderer@embedded-brains.de> | 2017-06-06 15:41:48 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2017-06-07 13:22:12 +0200 |
| commit | ce3ac00cfc9557797b11604158c3f4eb8859dcc6 (patch) | |
| tree | 02d80ebee18555c11aac7effd5485a0390570c61 | |
| parent | spcpuset01: Update due to CPU_NAND_S() changes (diff) | |
| download | rtems-ce3ac00cfc9557797b11604158c3f4eb8859dcc6.tar.bz2 | |
bsps/arm: Fix ARMv7-M interrupt suppport
Enable/disable vector routines now check for a valid vector. Without
these guards, the enable/disable vector routines will not work with the
interrupt server.
| -rw-r--r-- | c/src/lib/libbsp/arm/shared/armv7m/irq/armv7m-irq.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/c/src/lib/libbsp/arm/shared/armv7m/irq/armv7m-irq.c b/c/src/lib/libbsp/arm/shared/armv7m/irq/armv7m-irq.c index 6e80c1648a..df17c26cdd 100644 --- a/c/src/lib/libbsp/arm/shared/armv7m/irq/armv7m-irq.c +++ b/c/src/lib/libbsp/arm/shared/armv7m/irq/armv7m-irq.c @@ -24,14 +24,18 @@ rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector) { - _ARMV7M_NVIC_Set_enable((int) vector); + if (bsp_interrupt_is_valid_vector(vector)) { + _ARMV7M_NVIC_Set_enable((int) vector); + } return RTEMS_SUCCESSFUL; } rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) { - _ARMV7M_NVIC_Clear_enable((int) vector); + if (bsp_interrupt_is_valid_vector(vector)) { + _ARMV7M_NVIC_Clear_enable((int) vector); + } return RTEMS_SUCCESSFUL; } |