diff options
author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2016-07-04 20:34:39 +0200 |
---|---|---|
committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2016-07-05 08:02:24 +0200 |
commit | c30584738f4e2e3cd6c50c12385ad6dee7ad4657 (patch) | |
tree | 1a49c75158ffae802f282b02cd5ac1ba9c7b8500 | |
parent | Beaglebone: Update PWM driver imported from BBBIO (diff) | |
download | rtems-c30584738f4e2e3cd6c50c12385ad6dee7ad4657.tar.bz2 |
bsps/arm: Fix basic cache support for SMP
-rw-r--r-- | c/src/lib/libbsp/arm/shared/armv467ar-basic-cache/cache_.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/c/src/lib/libbsp/arm/shared/armv467ar-basic-cache/cache_.h b/c/src/lib/libbsp/arm/shared/armv467ar-basic-cache/cache_.h index de5fddb5aa..efca2bb24e 100644 --- a/c/src/lib/libbsp/arm/shared/armv467ar-basic-cache/cache_.h +++ b/c/src/lib/libbsp/arm/shared/armv467ar-basic-cache/cache_.h @@ -119,11 +119,11 @@ static inline void _CPU_cache_enable_data(void) rtems_interrupt_level level; uint32_t ctrl; - rtems_interrupt_disable(level); + rtems_interrupt_local_disable(level); ctrl = arm_cp15_get_control(); ctrl |= ARM_CP15_CTRL_C; arm_cp15_set_control(ctrl); - rtems_interrupt_enable(level); + rtems_interrupt_local_enable(level); } static inline void _CPU_cache_disable_data(void) @@ -131,12 +131,12 @@ static inline void _CPU_cache_disable_data(void) rtems_interrupt_level level; uint32_t ctrl; - rtems_interrupt_disable(level); + rtems_interrupt_local_disable(level); arm_cp15_data_cache_test_and_clean_and_invalidate(); ctrl = arm_cp15_get_control(); ctrl &= ~ARM_CP15_CTRL_C; arm_cp15_set_control(ctrl); - rtems_interrupt_enable(level); + rtems_interrupt_local_enable(level); } static inline void _CPU_cache_invalidate_entire_instruction(void) @@ -149,11 +149,11 @@ static inline void _CPU_cache_enable_instruction(void) rtems_interrupt_level level; uint32_t ctrl; - rtems_interrupt_disable(level); + rtems_interrupt_local_disable(level); ctrl = arm_cp15_get_control(); ctrl |= ARM_CP15_CTRL_I; arm_cp15_set_control(ctrl); - rtems_interrupt_enable(level); + rtems_interrupt_local_enable(level); } static inline void _CPU_cache_disable_instruction(void) @@ -161,11 +161,11 @@ static inline void _CPU_cache_disable_instruction(void) rtems_interrupt_level level; uint32_t ctrl; - rtems_interrupt_disable(level); + rtems_interrupt_local_disable(level); ctrl = arm_cp15_get_control(); ctrl &= ~ARM_CP15_CTRL_I; arm_cp15_set_control(ctrl); - rtems_interrupt_enable(level); + rtems_interrupt_local_enable(level); } #endif /* LIBBSP_ARM_ARMV467AR_BASIC_CACHE_H */ |