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authorSebastian Huber <sebastian.huber@embedded-brains.de>2017-03-09 14:32:04 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2017-03-09 14:32:04 +0100
commitb437a36064c9260ffb08e55a91a4812e59efa1c4 (patch)
tree62362e8b6b331f31cd0d4d897e5bd635b8766f90
parentdc95663e8bf5f1a0d7f22a19866981a8dd4c4825 (diff)
downloadrtems-b437a36064c9260ffb08e55a91a4812e59efa1c4.tar.bz2
arm: Fix CPU context validation for Cortex-R4
Do not touch the FPSCR[QC] bit since this is DNM/RAZ on Cortex-R4.
-rw-r--r--cpukit/score/cpu/arm/arm-context-validate.S6
-rw-r--r--cpukit/score/cpu/arm/arm-context-volatile-clobber.S4
2 files changed, 3 insertions, 7 deletions
diff --git a/cpukit/score/cpu/arm/arm-context-validate.S b/cpukit/score/cpu/arm/arm-context-validate.S
index 5bb2e25f6d..d735bc63e0 100644
--- a/cpukit/score/cpu/arm/arm-context-validate.S
+++ b/cpukit/score/cpu/arm/arm-context-validate.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2014 embedded brains GmbH. All rights reserved.
+ * Copyright (c) 2013, 2017 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
@@ -103,11 +103,7 @@ FUNCTION_ENTRY(_CPU_Context_validate)
#ifdef ARM_MULTILIB_VFP
/* R3 contains the FPSCR */
vmrs r3, FPSCR
-#ifdef ARM_MULTILIB_ARCH_V7M
ldr r4, =0xf000001f
-#else
- ldr r4, =0xf800001f
-#endif
bic r3, r3, r4
and r4, r4, r0
orr r3, r3, r4
diff --git a/cpukit/score/cpu/arm/arm-context-volatile-clobber.S b/cpukit/score/cpu/arm/arm-context-volatile-clobber.S
index b3c9d7739b..0b7e0f302d 100644
--- a/cpukit/score/cpu/arm/arm-context-volatile-clobber.S
+++ b/cpukit/score/cpu/arm/arm-context-volatile-clobber.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2014 embedded brains GmbH. All rights reserved.
+ * Copyright (c) 2013, 2017 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
@@ -33,7 +33,7 @@ FUNCTION_ENTRY(_CPU_Context_volatile_clobber)
#ifdef ARM_MULTILIB_VFP
vmrs r1, FPSCR
- ldr r2, =0xf800001f
+ ldr r2, =0xf000001f
bic r1, r1, r2
and r2, r2, r0
orr r1, r1, r2