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| author | Alexander Krutwig <alexander.krutwig@embedded-brains.de> | 2015-05-05 15:32:03 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2015-05-21 09:02:51 +0200 |
| commit | a9c4f15dbe5d0db8727dc7a9c82fc9ffa00e8cb6 (patch) | |
| tree | 48f26d93a2be66af0d1f3f4a987fc30606714c95 | |
| parent | bsps: Convert clock drivers to use a timecounter (diff) | |
| download | rtems-a9c4f15dbe5d0db8727dc7a9c82fc9ffa00e8cb6.tar.bz2 | |
doc: Clarify SPARC floating point ABI
| -rw-r--r-- | doc/cpu_supplement/sparc.t | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/doc/cpu_supplement/sparc.t b/doc/cpu_supplement/sparc.t index d21e9feef1..740643a4d3 100644 --- a/doc/cpu_supplement/sparc.t +++ b/doc/cpu_supplement/sparc.t @@ -425,10 +425,15 @@ f4, ... f30) f8, ... f28) @end itemize -The floating point status register (fpsr) specifies +The floating point status register (FSR) specifies the behavior of the floating point unit for rounding, contains its condition codes, version specification, and trap information. +According to the ABI all floating point registers and the floating point status +register (FSR) are volatile. Thus the floating point context of a thread is the +empty set. The rounding direction is a system global state and must not be +modified by threads. + A queue of the floating point instructions which have started execution but not yet completed is maintained. This queue is needed to support the multiple cycle nature of floating |